Senior Design Verification Engineer
- Hiring Organisation
- Berkeley Square - Talent Specialists in IT & Engineering
- Location
- City of London, London, United Kingdom
Senior Design Verification Engineer (FPGA/ASIC) My client, an HFT firm, is seeking a Senior Design Verification Engineer to work on high-performance FPGA and ASIC systems used in ultra-low-latency, real-time environments. Key responsibilities: Develop testbenches, tests, and verification environments … FPGA/ASIC designs Create and maintain detailed verification plans Debug and root-cause complex RTL issues Collaborate closely with hardware designers on new and existing projects Manage test suites, coverage, and CI infrastructure Contribute to internal tools and open-source verification projects Key requirements: 3+ years’ experience ...