SystemVerilog Jobs in East London

5 of 5 SystemVerilog Jobs in East London

Senior / Staff Digital Design Engineer

South East London, England, United Kingdom
Flux Computing
feed learnings back into the ASIC. Model algorithms and validate concepts in MATLAB/Simulink (or equivalent), ensuring functional equivalence through to gate‐level sign‐off. Own RTL development (SystemVerilog/Verilog/VHDL) including synthesis, static‐timing closure, formal and constrained‐random verification. Analyse power, performance and area (PPA); implement innovative techniques to achieve aggressive bandwidth‐per‐watt targets. More ❯
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FPGA Developer

South East London, England, United Kingdom
Radley James
Top proprietary trading firm with a significant presence in London is seeking to hire an experienced FPGA Developer to join their engineering team. As an FPGA Developer embedded in a small team, you will be responsible for designing, developing, testing More ❯
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Silicon Design Engineer

South East London, England, United Kingdom
Berkeley Square - Talent Specialists in IT & Engineering
optimization techniques. Strong analytical and problem-solving abilities. Preferred Skills: Experience with verification methodologies (UVM, assertions, formal verification). Knowledge of CPU/GPU/DSP architectures. Proficiency in SystemVerilog, C, Python, or scripting languages. More ❯
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Digital Design Engineer - Verification

South East London, England, United Kingdom
Flux Computing
AI compute fabrics. Your work will ensure first‐silicon success and robust, production‐worthy silicon that scales to data‐centre volumes. Responsibilities Architect, implement and maintain comprehensive verification environments (SystemVerilog + UVM, assertion‐based and formal) for datapath, control, memory and high‐speed I/O blocks in our OTPU. Define verification plans that target functional correctness, low‐power modes … techniques to keep Flux at the forefront of silicon quality. Skills & Experience 3+ years in digital ASIC/SoC design & verification, with at least two tape‐outs. Mastery of SystemVerilog/UVM, functional coverage, constraint‐random stimulus and scoreboards. Deep understanding of clock‐domain crossing, reset and power‐domain management, DFT/scan and low‐power (UPF/CPF) methodologies. More ❯
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Application Specific Integrated Circuit Design Engineer

South East London, England, United Kingdom
IC Resources
experience in frontend RTL design. Solid understanding of digital design principles, including pipelining, clock domain crossing, and low-power design techniques, high performance design techs. Proficient in Verilog/SystemVerilog/VHDL. Familiar with ASIC design flow and tools. Experience with GPU design or computer graphics architecture. Familiarity with high-speed interfaces and memory subsystems. Familiarity with modern graphics. You More ❯
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