51 to 75 of 85 RISC-V Jobs in England

My client is developing a new RISC-V product family. They have a fantastic technical pedigree; they invest heavily in verification methodology research and only hire the best. They're looking for a Staff Verification Engineer. Principal Verification Engineer Responsibilities: Develop and execute verification plans in collaboration with design and systems teams. Create and maintain testbenches using SystemVerilog More ❯

and Greece (pref Athens)** We believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance, and energy-efficient RISC-V CPU cores from scratch to power some of the most exciting applications - think high performance supercomputers and next-generation embedded systems. By also providing our own automated proprietary … aboard and let's architect a future of innovation together! We can't wait to see what you'll achieve at Codasip. Some useful Links on Codasip: Codasip RISC V Processor Solutions Design for differentiation: architecture licenses in RISC‐V Scaling is Failing - Dr. Ron Black, CEO, Codasip Codasip Labs to accelerate advanced technologies #J More ❯

and Greece (pref Athens)** We believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance, and energy-efficient RISC-V CPU cores from scratch to power some of the most exciting applications - think high performance supercomputers and next-generation embedded systems. By also providing our own automated proprietary … aboard and let's architect a future of innovation together! We can't wait to see what you'll achieve at Codasip. Some useful Links on Codasip: Codasip RISC V Processor Solutions Design for differentiation: architecture licenses in RISC‐V Scaling is Failing - Dr. Ron Black, CEO, Codasip Codasip Labs to accelerate advanced technologies #J More ❯

/Masters/Doctorate in EEE/ECE/CS/Maths Technical Skills: Linux/Unix Verilog/VHDL design Open-source projects in design/verification RISC-V/Arm/x86/MIPS SVA/PSL/Theorem proving Tcl/Python/Bash Soft Skills Problem solving Ownership Autonomy Team spirit Attention to detail More ❯

Design-for-Test (DFT) and Design-for-Debug (DFD) logic and issues Experience in clocking, reset, power-up sequences and power management Experience with x86, ARM Architecture (ISA), RISC-V, or PowerPC architecture Comfort with scripting such as Perl, Shell and TCL Benefits offered are described: AMD benefits at a glance . AMD does not accept unsolicited resumes More ❯

Kingdom 2 months ago Cambridge, England, United Kingdom 1 week ago Cambridge, England, United Kingdom 1 week ago CPU Architect - Assembly/C++/Python/ARM/RISC-V Cambridge, England, United Kingdom 3 days ago Schools System Administrator (SIMS and Timetabling) Bishop's Stortford, England, United Kingdom £25,000.00-£30,000.00 3 weeks ago Cambridge, England More ❯

junior engineers on verification methodology, code reviews, and best practices; champion continuous‐integration flows, regressions and results dashboards. Track industry advances in formal verification, emulation, coverage‐driven flows, RISC‐V vectors, and AI‐centric design techniques to keep Flux at the forefront of silicon quality. Skills & Experience 3+ years in digital ASIC/SoC design & verification, with at More ❯

junior engineers on verification methodology, code reviews, and best practices; champion continuous‐integration flows, regressions and results dashboards. Track industry advances in formal verification, emulation, coverage‐driven flows, RISC‐V vectors, and AI‐centric design techniques to keep Flux at the forefront of silicon quality. Skills & Experience 3+ years in digital ASIC/SoC design & verification, with at More ❯

junior engineers on verification methodology, code reviews, and best practices; champion continuous‐integration flows, regressions and results dashboards. Track industry advances in formal verification, emulation, coverage‐driven flows, RISC‐V vectors, and AI‐centric design techniques to keep Flux at the forefront of silicon quality. Skills & Experience 7+years in digital ASIC/SoC design & verification, with at least More ❯

000+ DOE, UK remote working + stock options! I'm currently partnered with a Semiconductor start-up, based in Silicon Valley. They are working on re-imagining Silicon, creating RISCV based computing platforms aimed at transforming the industry. As a Principal Performance Modelling Engineer you will develop functional and timing simulators, undertake performance analysis for architectural exploration and identify and More ❯

Social network you want to login/join with: Develop and optimize compiler technologies for our RISC-V vector core, focusing on efficient code generation and optimization for graphics and AI workloads. Key Responsibilities: Develop and maintain compiler backend for our RISC-V vector extensions Implement code generation and optimization passes for graphics and AI workloads … Strong knowledge of LLVM or similar compiler infrastructure Experience with code generation for vector architectures Understanding of graphics shader compilers and/or AI compiler stacks Familiarity with RISC-V architecture and vector extensions (preferred) Background in performance analysis and optimization BS/MS in Computer Science or related field #J-18808-Ljbffr More ❯

We're building a revolutionary RISC-V-based GPU and AI platform and are looking for bright, motivated graduates to join our team. If you're passionate about digital hardware design, want to learn from experienced engineers, and are excited about working on cutting-edge technologies like vector processing and neural compute, this is … the place for you. What You’ll Be Doing As a Graduate Hardware Engineer, you will: •Learn to design and implement RTL blocks as part of our custom RISC-V vector core GPU •Contribute to the development of high-performance, energy-efficient compute units for graphics and AI •Work closely with senior engineers to optimize design for performance … digital design principles and computer architecture •Exposure to RTL design languages such as SystemVerilog or VHDL (through coursework, projects, or internships) •An interest in GPUs, AI accelerators, or RISC-V architecture •Some experience or enthusiasm for scripting (e.g., Python, TCL More ❯

Join an innovative, rapidly expanding company at the forefront of the RISC-V revolution developing ICs that have high-impact applications across machine learning, aerospace, and automotive industries. The company offers a flat structure with a highly diverse workload and excellent benefits. Responsibilities: Develop and maintain verification infrastructure in collaboration with design teams and external partners. Define and … tests. Requirements: Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies. A solid understanding of mixed hardware/software verification approaches. Experience with RISC-V architectures is preferred. Proven ability to work effectively with design teams and external partners to achieve project goals. #J-18808-Ljbffr More ❯

Social network you want to login/join with: We're building a revolutionary RISC-V-based GPU and AI platform and are looking for bright, motivated graduates to join our team. If you're passionate about digital hardware design, want to learn from experienced engineers, and are excited about working on cutting-edge technologies like vector processing … the place for you. What You’ll Be Doing As a Graduate Hardware Engineer, you will: •Learn to design and implement RTL blocks as part of our custom RISC-V vector core GPU •Contribute to the development of high-performance, energy-efficient compute units for graphics and AI •Work closely with senior engineers to optimize design for performance … digital design principles and computer architecture •Exposure to RTL design languages such as SystemVerilog or VHDL (through coursework, projects, or internships) •An interest in GPUs, AI accelerators, or RISC-V architecture •Some experience or enthusiasm for scripting (e.g., Python, TCL) #J-18808-Ljbffr More ❯

and want to work on cutting-edge vector processing and neural compute technologies, this is your opportunity. Design Responsibilities: Architect and implement RTL for critical blocks within our RISC-V vector core GPU Design high-performance, power-efficient compute units for graphics and AI workloads Optimize microarchitecture to meet performance, power, and area (PPA) targets Work collaboratively with … of experience in RTL design (SystemVerilog or VHDL) Deep knowledge of digital design principles and computer architecture Experience with GPU, vector processors, or AI accelerator design Familiarity with RISC-V instruction set architecture (preferred) Understanding of graphics pipelines and/or neural network accelerators Awareness of physical design implications (DFT, timing, floorplanning) Proficiency with EDA tools (Synopsys, Cadence … Requirements: 5+ years of experience in hardware verification (complex SoCs preferred) Strong understanding of UVM and SystemVerilog methodologies Experience with advanced verification techniques (coverage, assertions, formal) Familiarity with RISC-V and GPU/AI architectures (preferred) Proficient with simulators and debug tools (e.g., VCS, Questa, ModelSim) Scripting experience in Python, Perl, or TCL Strong analytical and debugging skills More ❯

and want to work on cutting-edge vector processing and neural compute technologies, this is your opportunity. Design Responsibilities Assist in implementing RTL for key components of our RISC-V vector core GPUContribute to the design of efficient compute units for graphics and AI applications Help refine microarchitectures to meet power, performance, and area (PPA) goalsCollaborate with senior … design using SystemVerilog or VHDL Solid foundation in digital logic design and computer architecture Exposure to or strong interest in GPU, AI accelerators, or vector processors Familiarity with RISC-V ISA is a plus, not a mustUnderstanding of pipelining, memory hierarchies, or parallel compute conceptsInterest in learning physical design fundamentals (timing, DFT, floorplanning)Experience using EDA tools (e.g. … or internship projects count)Familiar with SystemVerilog and basic UVM conceptsInterest or exposure to functional coverage, assertions, and constrained-random testing Understanding of GPU/AI workloads or RISC-V architecture is a plusExperience using simulators like VCS, Questa, or ModelSimComfortable with scripting languages (Python, Perl, or TCL)Strong problem-solving skills and willingness to dive into debugging More ❯

required: Yes col-narrow-right Job Views: 4 Posted: 31.05.2025 Expiry Date: 15.07.2025 col-wide Job Description: Join an innovative, rapidly expanding company at the forefront of the RISC-V revolution developing ICs with high-impact applications across machine learning, aerospace, and automotive sectors. Enjoy a flat structure with a diverse workload and excellent benefits. Responsibilities: Develop and … dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM, with substantial experience in verification methodologies. Understanding of mixed hardware/software verification approaches. Experience with RISC-V architectures is preferred. Ability to collaborate effectively with design teams and external partners to achieve project goals. #J-18808-Ljbffr More ❯

required: Yes col-narrow-right Job Views: 4 Posted: 31.05.2025 Expiry Date: 15.07.2025 col-wide Job Description: Join an innovative, rapidly expanding company at the forefront of the RISC-V revolution developing IC that has high-impact applications across machine learning, aerospace and automotive. Flat structure with a highly diverse workload and excellent benefits. Responsibilities: Develop and maintain … tests. Requirements: Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies. A solid understanding of mixed hardware/software verification approaches. Experience with RISC-V architectures is preferred. Proven ability to work effectively with design teams and external partners to achieve project goals. #J-18808-Ljbffr More ❯

required: Yes col-narrow-right Job Views: 4 Posted: 31.05.2025 Expiry Date: 15.07.2025 col-wide Job Description: Join an innovative, rapidly expanding company at the forefront of the RISC-V revolution developing IC that has high-impact applications across machine learning, aerospace and automotive. Flat structure with a highly diverse workload and excellent benefits. Responsibilities: Develop and maintain … tests. Requirements: Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies. A solid understanding of mixed hardware/software verification approaches. Experience with RISC-V architectures is preferred. Proven ability to work effectively with design teams and external partners to achieve project goals. #J-18808-Ljbffr More ❯

required: Yes col-narrow-right Job Views: 4 Posted: 31.05.2025 Expiry Date: 15.07.2025 col-wide Job Description: Join an innovative, rapidly expanding company at the forefront of the RISC-V revolution developing IC that has high-impact applications across machine learning, aerospace and automotive. Flat structure with a highly diverse workload and excellent benefits. Responsibilities: Develop and maintain … tests. Requirements: Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies. A solid understanding of mixed hardware/software verification approaches. Experience with RISC-V architectures is preferred. Proven ability to work effectively with design teams and external partners to achieve project goals. #J-18808-Ljbffr More ❯

required: Yes col-narrow-right Job Views: 10 Posted: 06.06.2025 Expiry Date: 21.07.2025 col-wide Job Description: Join an innovative, rapidly expanding company at the forefront of the RISC-V revolution developing IC that has high-impact applications across machine learning, aerospace and automotive. Flat structure with a highly diverse workload and excellent benefits. Responsibilities: Develop and maintain … tests. Requirements: Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies. A solid understanding of mixed hardware/software verification approaches. Experience with RISC-V architectures is preferred. Proven ability to work effectively with design teams and external partners to achieve project goals. #J-18808-Ljbffr More ❯

required: Yes col-narrow-right Job Views: 9 Posted: 06.06.2025 Expiry Date: 21.07.2025 col-wide Job Description: Join an innovative, rapidly expanding company at the forefront of the RISC-V revolution developing IC that has high-impact applications across machine learning, aerospace and automotive. Flat structure with a highly diverse workload and excellent benefits. Responsibilities: Develop and maintain … tests. Requirements: Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies. A solid understanding of mixed hardware/software verification approaches. Experience with RISC-V architectures is preferred. Proven ability to work effectively with design teams and external partners to achieve project goals. #J-18808-Ljbffr More ❯

required: Yes col-narrow-right Job Views: 4 Posted: 31.05.2025 Expiry Date: 15.07.2025 col-wide Job Description: Join an innovative, rapidly expanding company at the forefront of the RISC-V revolution developing IC that has high-impact applications across machine learning, aerospace and automotive. Flat structure with a highly diverse workload and excellent benefits. Responsibilities: Develop and maintain … tests. Requirements: Strong proficiency in SystemVerilog and UVM, with substantial experience in industry-standard verification methodologies. A solid understanding of mixed hardware/software verification approaches. Experience with RISC-V architectures is preferred. Proven ability to work effectively with design teams and external partners to achieve project goals. #J-18808-Ljbffr More ❯

and want to work on cutting-edge vector processing and neural compute technologies, this is your opportunity. Design Responsibilities Assist in implementing RTL for key components of our RISC-V vector core GPU Contribute to the design of efficient compute units for graphics and AI applications Help refine microarchitectures to meet power, performance, and area (PPA) goals Collaborate … design using SystemVerilog or VHDL Solid foundation in digital logic design and computer architecture Exposure to or strong interest in GPU, AI accelerators, or vector processors Familiarity with RISC-V ISA is a plus, not a must Understanding of pipelining, memory hierarchies, or parallel compute concepts Interest in learning physical design fundamentals (timing, DFT, floorplanning) Experience using EDA … internship projects count) Familiar with SystemVerilog and basic UVM concepts Interest or exposure to functional coverage, assertions, and constrained-random testing Understanding of GPU/AI workloads or RISC-V architecture is a plus Experience using simulators like VCS, Questa, or ModelSim Comfortable with scripting languages (Python, Perl, or TCL) Strong problem-solving skills and willingness to dive More ❯

Role Overview: Lead the hardware engineering team in designing and implementing our RISC-V-based GPU and AI platform. This role requires extensive experience in SoC design, processor architecture, and team leadership. Key Responsibilities: Lead and mentor a team of hardware engineers through the complete development lifecycle Define hardware architecture and technical specifications aligned with project requirements Collaborate … design with 5+ years in a leadership role Strong background in GPU, DSP, or AI accelerator architecture Strong background in ASIC, SOC, IP and FPGA development Experience with RISC-V architecture preferred Deep understanding of computer architecture, particularly vector processing Experience with modern hardware design methodologies and tools Track record of successful product delivery Excellent communication, leadership, and More ❯