14 of 14 Verilog Jobs in Gloucestershire

FPGA Engineer — DSP & Real-Time (eDV Cleared)

Location
Cheltenham, England, United Kingdom
will work on FPGA design, DSP algorithm implementation, and system integration with embedded software to deliver mission-critical solutions. Required skills include VHDL/Verilog, MATLAB/Simulink, and Embedded C/C++ or Python for testing. Eligible for eDV clearance; on-site work is expected in Cheltenham or Romsey. ...

Lead SDR Engineer

Location
Gloucester, England, United Kingdom
signal processing Radio characterisation, front end device design, antenna selection, and link budget optimisation FPGA/RFSOC development experience and proficiency in VHDL (or Verilog) Embedded Linux, real‐time OS, and platform development including BSP/OSPs AWS, IaaC, Git, CICD pipelines, secure development practices, and mixed security classification software ...

OpenCPI Lead Software Engineer

Location
Gloucester, England, United Kingdom
Desired Skills EW or SIGINT capability development (including RF waveform and protocol vulnerability analysis) FPGA/RFSOC development experience and proficiency in VHDL (or Verilog) Familiarity with GnuRadio, MatLab, AMD EDF or other SDR development tools Commercial and Military communications stacks and modem development (e.g IEEE 802.x, COFDM, Satcoms ...

Senior DSP Engineer

Hiring Organisation
Lockheed Martin
Location
Gloucester, Gloucestershire, United Kingdom
Salary
£ 55 K
including RF waveform and protocol vulnerability analysis)Payload development for defence or covert communications systemsFPGA/RFSOC development experience and proficiency in VHDL (or Verilog)Familiarity with GnuRadio, MatLab, AMD EDF or other SDR development toolsRadio characterisation, front end device design, antenna selection, and link budget optimisation ...

Lead SDR Engineer

Hiring Organisation
Lockheed Martin
Location
Gloucester, Gloucestershire, United Kingdom
Salary
£ 80 K
digital signal processingRadio characterisation, front end device design, antenna selection, and link budget optimisationFPGA/RFSOC development experience and proficiency in VHDL (or Verilog)Embedded Linux, real-time OS, and platform development including BSP/OSPsAWS, IaaC, Git, CICD pipelines, secure development practices, and mixed security classification software developmentLeading technical ...

OpenCPI Lead Software Engineer

Hiring Organisation
Lockheed Martin
Location
Gloucester, Gloucestershire, United Kingdom
Salary
£ 80 K
with PythonDesired SkillsEW or SIGINT capability development (including RF waveform and protocol vulnerability analysis)FPGA/RFSOC development experience and proficiency in VHDL (or Verilog)Familiarity with GnuRadio, MatLab, AMD EDF or other SDR development toolsCommercial and Military communications stacks and modem development (e.g IEEE 802.x, COFDM, Satcoms, or Link ...

OpenCPI Senior Software Engineer

Hiring Organisation
Lockheed Martin
Location
Gloucester, Gloucestershire, United Kingdom
Salary
£ 60 K
protocol vulnerability analysis)Familiarity with GnuRadio, MatLab, AMD EDF or other SDR development toolsFPGA/RFSOC development experience and competency in VHDL (or Verilog)Commercial and Military communications stacks and modem development (e.g IEEE 802.x, COFDM, Satcoms, or Link 16)Working in AWS and CICD pipelined environments, especially with GitLab ...

FPGA Engineer- National Security

Location
Cheltenham, England, United Kingdom
Testing: use oscilloscopes, spectrum analysers and signal generators to validate designs in the lab Essential Skills & Experience Proven experience in FPGA design (VHDL/Verilog) and DSP algorithm implementation Strong command of VHDL/Verilog and MATLAB/Simulink Embedded C/C++ or Python for testing, automation and processor ...

Senior FPGA Engineer – SDR & RF Systems (Hybrid)

Location
Gloucester, England, United Kingdom
Lockheed Martin in Gloucester is seeking a Senior FPGA Engineer with VHDL/Verilog to contribute to defence, cyber, and intelligence programmes. You will help design, develop, test and deploy RF systems and SDR applications within a multi-disciplinary team, using the OpenCPI framework. The role offers hybrid work options ...

Principal FPGA Engineer

Hiring Organisation
Thales Group
Location
Bristol, Gloucestershire, United Kingdom
Salary
£ 60 K
fellowship of a professional engineering body preferably with or working towards chartered status.Experience Leading Firmware design/architectureVerification Test bench architecture with System Verilog or C++Verification Methodology: Advanced VHDL verification or OSVVM/UVVMRequirements Management: IBM Rationale DOORSSimulation of designs using simulator tool: Mentor Graphics Modelsim/QuestasimDigital electronic design … hardware development languages: VHDL and either Verilog or System VerilogImplementation of complex designs using any vendor specific development toolsTechnologies: PCIe, Ethernet, Serial Comms, AXI4Object Orientated design TechniquesImage processing techniques and algorithmsAlgorithm development using development tool: MatLabSecurity Clearance StatementThis role will require SC Clearance. It would be advantageous if currently held ...

Senior FPGA Engineer

Location
Gloucester, England, United Kingdom
About The Role We are looking for a Senior FPGA Engineer with experience in VHDL (or Verilog) to join our growing team at our Gloucester site. This exciting opportunity allows you to work on a variety of Defence, Cyber, and Intelligence programmes, contributing to the design, development, and deployment … software-defined radio technologies and architectures Working knowledge of digital signal processing, algorithm or payload development, and embedded system design Competent in VHDL (or Verilog) for embedded applications Desired Skills EW or SIGINT capability development (including RF waveform and protocol vulnerability analysis) Familiarity with GnuRadio, MatLab, AMD EDF or other ...

Senior FPGA Engineer

Hiring Organisation
Lockheed Martin
Location
Gloucester, Gloucestershire, United Kingdom
Salary
£ 60 K
/Casual: FullTimeDepartment: RMS UK SvcsBusiness Unit: RMS UK SvcsAbout the roleWe are looking for a Senior FPGA Engineer with experience in VHDL (or Verilog) to join our growing team at our Gloucester site. This exciting opportunity allows you to work on a variety of Defence, Cyber, and Intelligence programmes … communications and software-defined radio technologies & architecturesWorking knowledge of digital signal processing, algorithm or payload development, and embedded system designCompetent in VHDL (or Verilog) for embedded applicationsDesired SkillsEW or SIGINT capability development (including RF waveform and protocol vulnerability analysis)Familiarity with GnuRadio, MatLab, AMD EDF or other SDR development toolsCommercial ...

Senior Verification Engineer (IP verification)

Hiring Organisation
ARM
Location
Bristol, Gloucestershire, United Kingdom
Salary
£ 70 K
partners to develop outstanding systems.Responsibilities:Your key responsibilities will include writing test plans, defining test methodologies, developing C based software tests, SystemVerilog/Verilog testbenches and tests, and debugging of test failures and issues.Working with project management and leads on planning tasks, schedules, and reporting progress.Collaborate with engineers from other … teams including architecture, design, implementation, modelling, performance analysis, silicon validation, FPGA and board development.Necessary Skills and Experience:Proven understanding of digital hardware verification language Verilog/Systemverilog HDL.Skilled in one or more of various verification approaches – UVM, formal, power aware verification.Experience in SoC verification using Embedded Low-level programming including ...

Senior Staff Verification Engineer (f/m/div)

Hiring Organisation
Infineon Technologies
Location
Bristol, Gloucestershire, United Kingdom
Salary
£ 70 K
drive the development and optimization of IP verification environments, ensuring robust and efficient test bench architecture.Take full ownership of complex IP verification, developing System Verilog - UVM test bench environmentsCreate functional coverage models and write constrained random tests for thorough validationEnsure test benches meet sign-off targets, including coverage and functional … methodologies.Bachelor’s degree in Electrical/Electronic Engineering or a related field8+ years of experience in Verification Engineering, with hands-on exposure to System Verilog - UVM (academic, internship, or professional experience)Strong understanding of verification concepts and System Verilog design and testbench fundamentalsEagerness to learn and apply industry-standard verification ...