8 of 8 Verification Engineer Jobs in London

Senior Verification Engineer UK Remote I am seeking a Senior Verification Engineer to join an established and fast-growing startup as it enters its next phase of growth. With a team of nearly 100 people, this company is at the forefront of post-quantum cryptography , developing … verifying highly secure designs, working closely with experienced engineers in a collaborative, high-trust environment. What you’ll be doing As part of the verification team, you will: Build and extend UVM testbenches to verify cryptographic IP and subsystem designs Develop Python-based tools and automation to improve verification ...

Senior Verification Engineer RF DSP This role is all about depth. Proper signal-chain verification, not tick-box regression. What you will be doing Owning verification of DSP and RF signal-chain blocks using UVM and advanced methodologies Validating complex algorithms including FFT, FIR and channelisers … Building and maintaining class-based testbenches with VIP integration What you need Strong UVM and constrained-random verification experience Proven DSP verification background Python scripting and CI CD workflows Git proficiency Experience with Adaptive SoC flows using Vivado and Vitis MATLAB experience highly desirable Senior Verification Engineer ...

Design Verification Engineer Location: London HQ | Fully remote within the UK (quarterly visits) Salary: Up to £80,000 base I’m currently recruiting for a Design Verification Engineer on behalf of a leading managed service provider that is partnering with a global semiconductor powerhouse to build … compliance of complex digital ASIC core and IP designs. The role focuses on deep unit- and core-level verification. Key Responsibilities Develop comprehensive core verification plans based on micro-architecture and design specifications. Architect and implement robust, reusable verification environments using SystemVerilog and UVM. Create and execute constrained ...

passionate about ensuring the functional correctness of complex digital ASIC designs? We have an exciting opportunity for a Digital Verification Engineer to join a dynamic team, working remotely with occasional visits to the London office. Role: Digital Verification Engineer (Remote) Location: Remote occasional travel to London … functional correctness and performance of complex digital ASIC Core/IP designs, including deep unit and core-level verification. Develop robust SystemVerilog/UVM verification environments. Create and execute tests to achieve high coverage and debug complex failures. Collaborate closely with design teams to deliver high-quality results. Automate ...

passionate about ensuring the functional correctness of complex digital ASIC designs? We have an exciting opportunity for a Digital Verification Engineer to join a dynamic team, working remotely with occasional visits to the London office. If you would like to know a bit more about this opportunity … considering applying, then please read the following job information. Role: Digital Verification Engineer (Remote) Location: Remote occasional travel to London Rate/Salary: Negotiable Duration: Permanent What Youll Do: Ensure the functional correctness and performance of complex digital ASIC Core/IP designs, including deep unit and core ...

passionate about ensuring the functional correctness of complex digital ASIC designs? We have an exciting opportunity for a Digital Verification Engineer to join a dynamic team, working remotely with occasional visits to the London office. Role: Digital Verification Engineer (Remote) Location: Remote occasional travel to London ...

Digital Verification Engineer – UK Remote (Up to £75,000 DOE) A leading global engineering organisation is building a new UK chip team to support a major US tech programme. They’re looking for experienced Digital Verification Engineers to work on advanced ASIC Core/IP development. Fully … remote across the UK with quarterly visits to London. What You’ll Do Own unit‐level and core‐level verification for complex digital IP Build scalable SystemVerilog/UVM environments Develop constrained‐random and directed tests to drive high coverage Debug failures across RTL, testbench, and micro‐architecture Automate ...

working with one of the most prestigious high-frequency trading companies in the world to find a verification engineer to help verify their complex low-latency FPGA systems. You'll be joining a team at the forefront of innovation in design verification, where you'll be supported … envelope alongside top pioneers in verification. Responsibilities Design and maintain robust testbenches and targeted tests using the organisation’s mixed open-source and proprietary verification environment. Develop and own comprehensive verification plans, ensuring coverage goals and test strategies are clear and defensible. Identify and diagnose RTL issues quickly ...