Staff RTL Design Engineer - CPU Midcore
- Hiring Organisation
- Jobleads-UK
- Location
- Cambridge, England, United Kingdom
will be part of a team of engineers who are passionate about designing industry-leading CPU cores, based on the revolutionary open‐source RISC‐V architecture. The role involves bringing new hardware IP to market quickly, with high quality and exceptional performance in a fast‐paced dynamic environment. … Responsibilities Architect, design and implement new features, performance improvements, and ISA extensions in RISC‐V CPU core generators using Chisel. Integrate new design content into SiFive’s Chisel/FIRRTL framework and contribute to improvements to that framework to enable automatic configuration/generation of documentation, verification testbenches ...