Reading, Berkshire, South East, United Kingdom Hybrid / WFH Options
Fortis Recruitment Solutions
to flight qualification. Key Skills & Experience Essential: Degree in Electronic/Electrical/Computer Engineering (or equivalent) Strong experience in digital design with VHDL and/or Verilog/SystemVerilog Proven track record performing synthesis, timing closure, and static timing analysis Experience with FPGA tool flows (e.g. Xilinx Vivado, Intel/Altera tools, or similar) Familiarity with simulation/verification More ❯
Southampton, Hampshire, South East, United Kingdom Hybrid / WFH Options
Fortis Recruitment Solutions
signal processing applications Contribute to architecture decisions, documentation, and technical reviews Collaborate across disciplines (design, verification, algorithms, implementation, system integration) Key Skills & Experience Essential: Expert knowledge of RTL (Verilog, SystemVerilog) for FPGA/ASIC products Strong track record delivering FPGA/ASIC digital designs Experience with synthesis, static timing analysis, power optimisation, and high-throughput design Proficiency with industry-standard More ❯
with firmware, software and infrastructure teams to optimise full-stack performance. What You’ll Need 7+ years’ FPGA/RTL design experience in timing-critical systems. Strong background in SystemVerilog, synthesis, timing closure and verification. Hands-on with Vivado/Quartus or equivalent toolchains. Familiarity with AXI, PCIe, Ethernet or custom high-speed interfaces. Nice to Have Exposure to high More ❯
with firmware, software and infrastructure teams to optimise full-stack performance. What You’ll Need 7+ years’ FPGA/RTL design experience in timing-critical systems. Strong background in SystemVerilog, synthesis, timing closure and verification. Hands-on with Vivado/Quartus or equivalent toolchains. Familiarity with AXI, PCIe, Ethernet or custom high-speed interfaces. Nice to Have Exposure to high More ❯
Oxford, England, United Kingdom Hybrid / WFH Options
IC Resources
and skills Bachelor’s or Master’s degree in Electronic Engineering (or related field) Experience in digital ASIC design and verification, including: Defining functional requirements for verification environments & metrics SystemVerilog UVM testbenches Formal proof verification Understanding of C test cases and C code Scripting languages (e.g. Python, Perl, TCL) Desirable skills Experience with formal verification tools (JasperGold, VC Formal) Familiarity More ❯
banbury, south east england, united kingdom Hybrid / WFH Options
IC Resources
and skills Bachelor’s or Master’s degree in Electronic Engineering (or related field) Experience in digital ASIC design and verification, including: Defining functional requirements for verification environments & metrics SystemVerilog UVM testbenches Formal proof verification Understanding of C test cases and C code Scripting languages (e.g. Python, Perl, TCL) Desirable skills Experience with formal verification tools (JasperGold, VC Formal) Familiarity More ❯
Location: Luton (mostly onsite) Duration: 12 month contract Rate: 88ph UMB (Inside IR35) Role details: Our client, a leading company in the Defence & Security sector, is currently seeking an FPGA Engineer to join their team in Luton on a contract More ❯
Cambridge, Cambridgeshire, East Anglia, United Kingdom
Enterprise Recruitment Limited
engineering experience (implementation, simulation, verification and test) Strong background in Digital Signal Processing (DSP) design and optimisation Excellent academic background with a degree from a top university Proficiency in SystemVerilog or VHDL Experience with high-speed external interfaces (e.g. PCIe, Aurora, Ethernet, SPI) Proven ability to take technical ownership, collaborate effectively, and deliver complex projects Position: Senior FPGA Engineer Location More ❯
Langley, Slough, Berkshire, England, United Kingdom
Active Silicon
bachelor’s degree in electronic engineering or a related field. At least 3+ years of commercial FPGA and general hardware design experience. Proficient in FPGA design using VHDL/SystemVerilog with AMD (Xilinx), Lattice, or Intel (Altera) products. Familiar with high-speed interfaces and advanced simulation methods. Strong communication skills for effective collaboration with team members and clients. What we More ❯
Principal Firmware Engineer Luton Paying up to 80p/h (Umbrella) Responsibilities : Artificial Intelligence, including machine learning and genetic algorithms Auto-generated code using model driven engineering using MATLAB and Simulink tools Design tools such as Xilinx, TCL, Verilog, System More ❯
Electrical or Computer Engineering (or related discipline). Proven experience in digital IC design, ideally within AI accelerators, NPUs, GPUs, or high-performance ASICs. Strong RTL design skills using SystemVerilog/Verilog and familiarity with EDA tools for simulation, synthesis, and timing analysis. Knowledge of low-power design, high-speed interfaces (e.g., HBM, DDR5, PCIe), and standard on-chip protocols. More ❯
Electrical or Computer Engineering (or related discipline). Proven experience in digital IC design, ideally within AI accelerators, NPUs, GPUs, or high-performance ASICs. Strong RTL design skills using SystemVerilog/Verilog and familiarity with EDA tools for simulation, synthesis, and timing analysis. Knowledge of low-power design, high-speed interfaces (e.g., HBM, DDR5, PCIe), and standard on-chip protocols. More ❯
Electrical or Computer Engineering (or related discipline). Proven experience in digital IC design, ideally within AI accelerators, NPUs, GPUs, or high-performance ASICs. Strong RTL design skills using SystemVerilog/Verilog and familiarity with EDA tools for simulation, synthesis, and timing analysis. Knowledge of low-power design, high-speed interfaces (e.g., HBM, DDR5, PCIe), and standard on-chip protocols. More ❯
Electrical or Computer Engineering (or related discipline). Proven experience in digital IC design, ideally within AI accelerators, NPUs, GPUs, or high-performance ASICs. Strong RTL design skills using SystemVerilog/Verilog and familiarity with EDA tools for simulation, synthesis, and timing analysis. Knowledge of low-power design, high-speed interfaces (e.g., HBM, DDR5, PCIe), and standard on-chip protocols. More ❯
engineering experience (implementation, simulation, verification and test) Strong background in Digital Signal Processing (DSP) design and optimisation Excellent academic background with a degree from a top university Proficiency in SystemVerilog or VHDL Proven ability to take technical ownership, collaborate effectively, and deliver complex projects Position: Senior FPGA Engineer Location: Cambridge Salary: £70k–£120k + equity Key Skills: FPGA, DSP, Verilog More ❯
level and chip-level verification, including linting, synthesis, timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic More ❯
level and chip-level verification, including linting, synthesis, timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic More ❯
level and chip-level verification, including linting, synthesis, timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic More ❯
level and chip-level verification, including linting, synthesis, timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic More ❯
london (city of london), south east england, united kingdom
IC Resources
level and chip-level verification, including linting, synthesis, timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic More ❯
level and chip-level verification, including linting, synthesis, timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Desirable Experience Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP More ❯
Our client is seeking Firmware Engineers for contracts based in Luton, Bedfordshire. The Firmware Engineer will deliver Firmware for complex digital systems that meet challenging future customer requirements. Responsibilities Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM More ❯
Cambridge, England, United Kingdom Hybrid / WFH Options
IC Resources
area Qualifications & Skills BS/MS in Electrical Engineering, Computer Engineering, or Computer Science 5+ years’ hands-on experience in microarchitecture and RTL development Strong proficiency in Verilog and SystemVerilog Familiarity with industry-standard EDA tools and methodologies Experience with large, high-speed, pipelined, and low-power designs Deep understanding of on-chip interconnects and NoCs Experience designing IP blocks More ❯
architecture teams to ensure verification quality Qualifications Bachelor’s or Master’s in Electrical Engineering (or related field) Strong experience in ASIC verification and digital hardware design Skilled in SystemVerilog/UVM testbench development Knowledge of low-power verification techniques Familiarity with C for testbench development is a plus Experience in WiFi/wireless SoC development is desirable Excellent communication More ❯
cambridge, east anglia, united kingdom Hybrid / WFH Options
IC Resources
area Qualifications & Skills BS/MS in Electrical Engineering, Computer Engineering, or Computer Science 5+ years’ hands-on experience in microarchitecture and RTL development Strong proficiency in Verilog and SystemVerilog Familiarity with industry-standard EDA tools and methodologies Experience with large, high-speed, pipelined, and low-power designs Deep understanding of on-chip interconnects and NoCs Experience designing IP blocks More ❯