26 to 31 of 31 C Jobs in Worcestershire

Senior Software Engineer – C/C++ Global FinTech Remote (NI & RoI) Permanent | Full-time £60K + bonus & excellent benefits package IT Search has partnered with a global fintech that’s growing its UK engineering team. They’re looking for a Senior C/C++ Engineer to help build and maintain … to influence how modern payment systems are built and maintained in a collaborative environment with strong technical standards. What you need: Solid experience with C or C++ in a production environment Familiarity with modern software engineering practices: version control, testing, code reviews Comfortable working with structured data (e.g. XML, JSON More ❯

DV/UK*C Cleared Infrastructure Engineer - Hybrid working ( South West, Middlands & North)- £Competitive Salary Please note: Due to the nature of the work, all candidates must have a HLC eDV that is active and transferrable. Candidates must also be s ole UK National with minimum 10 years unbroken residency. More ❯

JD Edwards Developer - ERP, JDE, JD Edwards, Oracle E1, XE, Developer, JDE Developer, JDE Technical Consultant, Business Systems, Database, Orchestrator, Applications, Windows, Android, iOS, C Business Functions, UBE’s, NERs, SOA, EDI, Reports, Interfaces, Applications, C, C++, C#, Java, SQL, AS/400, IBM I, DB2, UDB, JSON, REST, TCP More ❯

BMC Software is looking for a Senior Assembler Developer to join our dynamic development team! In this role, you will be a contributing member of the team responsible for designing, developing, troubleshooting, and debugging software programs. These include software tools More ❯

Skills & Experience needed: Prior working experience with compiler technologies may that be with Frontend/Backend LLVM or MLIR. Strong programming language skills with C and/or C++. Familiarity with a GPGPU API such as SYCL, CUDA or OpenCL. Open Source code commits and reviews are beneficial. Experience of … techniques for GPGPU code would be a plus but not essential. Keywords: Compiler/Compilation/LLVM/GCC/OpenSource/Linux/C/C++/Low level/Hardware/debuggers/Fortran/OpenCL/CUDA/MLIR/Machine Learning/GPU/GPGPU By More ❯

Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot , and C code, GNU toolchain ) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the … RTL. • Methodologies will include a mix of design checks, verification techniques using simulators and emulators: UVM, formal, Verilog/System Verilog based testbenches and C, System Verilog, UVM based testcases More ❯