26 to 50 of 65 JTAG Jobs

in leading a design team Experience in hardware test and measurement and hands-on lab debug Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »

in leading a design team Experience in hardware test and measurement and hands-on lab debug Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »

in leading a design team Experience in hardware test and measurement and hands-on lab debug Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »

in leading a design team Experience in hardware test and measurement and hands-on lab debug Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »

in leading a design team Experience in hardware test and measurement and hands-on lab debug Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »

in leading a design team Experience in hardware test and measurement and hands-on lab debug Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »

in leading a design team Experience in hardware test and measurement and hands-on lab debug Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »

in leading a design team Experience in hardware test and measurement and hands-on lab debug Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx LInC Electronic Warfare Original Posting Date: 2024-04-29 While subject to change based on business needs, Leidos reasonably anticipates that this job requisition more »

SVA, VIP, and UPF), for ASIC implementation. Strong RTL coding with Verilog and System Verilog. Strong knowledge of interface technology (I2C, SPI, UART, SWD, JTAG, etc). Strong knowledge of on-chip bus protocol (AMBA AHB, APB, AXI-Stream, etc). Experience with Linux OS, revision control (Git) and scripting more »

SVA, VIP, and UPF), for ASIC implementation. Strong RTL coding with Verilog and System Verilog. Strong knowledge of interface technology (I2C, SPI, UART, SWD, JTAG, etc). Strong knowledge of on-chip bus protocol (AMBA AHB, APB, AXI-Stream, etc). Experience with Linux OS, revision control (Git) and scripting more »

Clock and reset domain crossing techniques. DFT, especially memory testing and characterization and/or Logic BIST methodologies. Manufacturing test, device characterization and qualification, JTAG, reliability testingHardware development experience in UNIX/Linux environments, including supporting tasks such as shell scripting and basic Perl scripts Ability to work with technical more »

pragmatic approaches to resolving technical issues. Experience in most of the following areas is required: An understanding of embedded systems including programming devices (e.g. JTAG) A basic understanding of electronics (digital and analogue signals, communication protocols) The ability to understand and evaluate requirements The ability to write tests cases based more »

airborne applications. o Experience of designing for and test/verification MIL-STD’s and DO160. o Test and verification using tools such as JTAG Boundary Scan Testing o Experience of test equipment such as oscilloscopes, analysers and signal generators. Education & Certifications • Required is a Bachelors degree in Electronics or more »

thinking and attention to detail Highly skilled individual with many successful tape outs/experience MBIST expert ATPG/scan insertion expert Scan compression, JTAG, OCC Very good vector generation and simulation skills Industry knowledge of ATE test systems like Teradyne or Advantest Why apply for this job ? You will more »

or airborne applications. o Experience of designing for and test/verification MIL-STDs and DO160. o Test and verification using tools such as JTAG Boundary Scan Testing o Experience of test equipment such as oscilloscopes, analysers and signal generators. Education & Certifications Required is a Bachelors degree in Electronics or more »

military or airborne applications. Experience of designing for and test/verification MIL-STD’s and DO160. Test and verification using tools such as JTAG Boundary Scan Testing Experience of test equipment such as oscilloscopes, analysers and signal generators Industry experience - Security, Defence, Aviation & Aerospace Benefits Package - 40 hours per more »

mechanical and electrical machines and safe working with low to medium power RF signals. Basic Understanding of: RF measurement techniques and equipment - Boundary scan (JTAG) test, diagnostics and programming - Firmware coding. Related competence in one or more of the following: The use of CAE Design tools - Negotiation of subsystem requirements more »

FPGA (Xilinx, Intel) and MPSoC (Xilinx) Power supply design including filtering/isolation, point of load and power sequencing Clock tree including jitter specification JTAG/Boundary Scan Design analysis using industry standard tools such Siemens HyperLynx SI/PI) and SPICE. Estimation, planning and execution of work to build more »

FPGA (Xilinx, Intel) and MPSoC (Xilinx) Power supply design including filtering/isolation, point of load and power sequencing Clock tree including jitter specification JTAG/Boundary Scan Design analysis using industry standard tools such Siemens HyperLynx SI/PI) and SPICE. Estimation, planning and execution of work to build more »

to ensure timely production readiness. Requirements for the IC Test Engineer: Experience with Semiconductor IC testing experience. Experience with Digital Testing techniques (BIST, SCAN, JTAG). Test programming skills (Unix, C, C+). Familiarity with Teradyne UltraFlex or Advantest 93K ATE platforms. Strong communication skills. Willingness to travel (Europe, Asia more »

Test Systems, particularly NI PXI based production (NPI) test equipment for Electronic Power Control Units, incorporating Mil Std., ARINC 429, CAN Bus, RS422, RS232, JTAG, and other high-speed logic. Compile top-level scripts and lower-level LabVIEW drivers, NI TestStand, and ensure traceability via DOOR and Technical Requirements/ more »

DFT skills considered for this position should include some of the following: Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate level verification, silicon debug, memory and scan diagnostics Bachelors or Master's degree or more »

experience. PWB layout knowledge. Standards understanding including MIL and DO. Familiar with multiple communication protocols (CAN, PCIe, RS232/422/485, Ethernet, SPI, JTAG, etc.). You should be very promotable with a desire to stay technical. Why is This a Great Opportunity: Great growth opportunity with well-established more »

some of the following: Knowledge of at-speed testing, test insertion and test coverage assessment, test pattern development, scan compression, Memory BIST, Logic BIST, JTAG, IJTAG, fault simulation, debug, verification, designing and conducting experiments/tool evaluations. Experience with Siemens, Cadence and/or Synopsys DFT tools "Nice To Have more »

include some of the following: Siemens DFT tools, Streaming Scan Network (SSN), Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate level verification, silicon debug, memory and scan diagnostics. Experience coding Verilog RTL, TCL and more »