26 to 50 of 60 Remote/Hybrid SystemVerilog Jobs

development Experience in static design checks, including CDC, RDC, X-prop, Lint and UPF static checks Experience creating design specifications Experience with Verilog/SystemVerilog and verification methodologies Strong delivery record of sophisticated RTL subsystems in reasonable timescales Ability to navigate and make high-level analysis driven PPA trade-offs ...

understand and review the architecture and design specifications, and to build a functional verification strategy. Your key responsibilities will include crafting test plans, developing SystemVerilog/Verilog/UVM testbenches and tests, and debugging of test failures and issues. You will also be to developing and improving the verification methodologies ...

Microprocessor architecture, Arm IP or Arm-based SoCs Optimization, large-scale data processing or performance-sensitive software Additional languages such as C++, Tcl or SystemVerilog LLM-based coding assistants such as Codex or Claude Code, including reviewing and validating AI-generated code In Return: This role offers the opportunity ...

cause analysis of issues identified throughout the verification process. Required Skills and Experience :Experience building verification environments for sophisticated RTL designs. Strong proficiency in SystemVerilog and scripting languages such as Python, Perl, or Tcl. Proven grasp of the complete verification process, starting from test planning and continuing through to verification ...

## VHDL FPGA Firmware EngineerApplylocations: GB - Southampton: GB - Bristol - Coldharbour Lanetime type: Full timeposted on: Posted Todayjob requisition id: R0026952**Job Description:****Salary Ranges**Engineer: £38k - £53kSenior: £45k - £61kLeonardo UK operates a grade-based salary ...

will lead the design and verification of FPGA test benches and contribute to robust control systems for quantum hardware. You will own verification environments (SystemVerilog/UVM), drive constrained‐random testing and coverage, and help shape automated regression and CI pipelines. Hybrid work and competitive compensation are offered. #J ...

verification engineer to join a Sub-System level team focused on PCIe and CXL verification and performance analysis. You will craft test plans, build SystemVerilog/Verilog/UVM testbenches, and debug complex test failures to ensure robust IO verification. You will collaborate with RTL architects, verification engineers ...

reliability. Required Skills and Experience: 8+ years of experience in RTL build, microarchitecture, subsystem integration, or related semiconductor roles. Deep hands‐on expertise in SystemVerilog and the development of sophisticated, high‐performance digital subsystems. Deep understanding of PCIe, CXL, and UALink, covering transaction flows, ordering, flow control, retries, error handling ...

reliability. Required Skills And Experience 8+ years of experience in RTL build, microarchitecture, subsystem integration, or related semiconductor roles. Deep hands-on expertise in SystemVerilog and the development of sophisticated, high-performance digital subsystems. Deep understanding of PCIe, CXL, and UALink, covering transaction flows, ordering, flow control, retries, error handling ...

FPGA; you will develop verification plans, create UVM testbenches and support integration and tape-out readiness. Requirements include 3+ years in digital verification, strong SystemVerilog/UVM, Linux scripting and a collaborative mindset. Hybrid working with a competitive package is offered. #J-18808-Ljbffr ...

circuits for 200+Gbps links, with emphasis on power efficiency and performance. You will collaborate with architects, hardware and verification engineers, developing RTL in SystemVerilog and using front-end ASIC tools, with emphasis on robust documentation. Hybrid work in Edinburgh and AMD benefits are offered. #J-18808-Ljbffr ...

should have a BEng or MEng in a relevant field and at least 5 years of experience in digital design, with proficiency in Verilog, SystemVerilog, and/or VHDL. The role offers a hybrid work model and Visa sponsorship is available. #J-18808-Ljbffr ...

front-end digital design and verification for next-generation mixed-signal ASICs used in implantable neural interfaces. You will write clean Verilog/SystemVerilog, develop robust verification environments, drive RTL from concept to tape-out, and collaborate with analog, hardware, and software teams in a fast-paced startup. #J ...

will configure Deltaflow Hardware, ensuring low-latency, high-throughput connections essential for quantum experiments. The ideal candidate has experience with FPGA platforms, proficiency in SystemVerilog or VHDL, and strong communication skills. This role offers a hybrid working environment and opportunities for personal and professional growth. #J-18808-Ljbffr ...

work remotely from the UK/EU. The ideal candidate will have over 8 years of experience, with strong expertise in UVM/SystemVerilog and hands-on experience with HPC protocols such as PCIe and DDR. This role involves verification of various controllers and writing new test cases, requiring strong ...

/emulation mismatches and test failures. Hands-on experience with emulation platforms such as ZeBu, Palladium, or Strato. Familiarity with RTL languages such as SystemVerilog/Verilog Experience in collaboration with EDA vendors to introduce new capabilities, resolve tool issues, and contribute to future tool improvements. Skilled in planning system ...

Job Description: Your impact An exciting opportunity has arisen within Leonardo for a Lead Firmware/FPGA Specialist to work within the Surveillance Sector, developing firmware, working on FPGAs, that underpins both our current proven ...

## Firmware/FPGA Engineers - all levelsApplylocations: GB - Edinburgh: GB - Newcastletime type: Full timeposted on: Posted Todayjob requisition id: R0030762**Job Description:**Salary: Engineer: £37,400 to £53,550/Senior: £45, 200 to £61 ...

open-source silicon team. This permanent, hybrid role offers involvement in OpenTitan Root of Trust and Ibex CPU verification. You will develop and debug SystemVerilog/UVM testbenches, create verification plans, and collaborate with design engineers to deliver high-quality silicon, while contributing to open-source projects and robust verification ...

validation, helping ensure high-quality, reliable products. In this role, you will: Design and develop firmware using Hardware Description Languages (VHDL, Verilog, or SystemVerilog) Lead or contribute to firmware architecture and design decisions Verify and validate firmware using simulation and testbench environments Work closely with systems, hardware, and software engineers … operate with a high level of autonomy. You'll bring: Strong experience developing firmware for FPGA-based systems Expertise in VHDL, Verilog, or SystemVerilog Experience with simulation and verification tools (e.g. ModelSim, QuestaSim) Solid understanding of digital design and hardware/software integration Ability to contribute to or lead design ...

validation, helping ensure high-quality, reliable products. In this role, you will: Design and develop firmware using Hardware Description Languages (VHDL, Verilog, or SystemVerilog) Lead or contribute to firmware architecture and design decisions Verify and validate firmware using simulation and testbench environments Work closely with systems, hardware, and software engineers … operate with a high level of autonomy. You'll bring: Strong experience developing firmware for FPGA-based systems Expertise in VHDL, Verilog, or SystemVerilog Experience with simulation and verification tools (e.g. ModelSim, QuestaSim) Solid understanding of digital design and hardware/software integration Ability to contribute to or lead design ...

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monitoring ultra-low-power analog frontends, stimulation engines, and telemetry. We are seeking an engineer who excels at writing clean, synthesizable Verilog/SystemVerilog and developing robust verification environments. You will play a key hands-on role in taking digital architectures from concept and specification through RTL implementation, front … specification, and implementation of digital control, telemetry/serial communication, and power sequencing for mixed-signal ASICs. Develop clean, maintainable, and synthesizable Verilog/SystemVerilog RTL with a strong focus on safe, ultra low-power operation. Collaborate closely with analog IC designers to define mixed-signal boundaries, control register maps ...

quality requirements prior to FPGA deployment and ASIC tape-out. Key Responsibilities Develop verification plans from design and architecture specifications. Create and maintain SystemVerilog/UVM verification environments. Develop testbenches, assertions, scoreboards and coverage models. Execute directed and constrained-random verification. Analyse coverage and debug RTL and verification issues. Support … Degree in Electronic Engineering, Computer Engineering or a related discipline. At least 3 years experience verifying digital ASIC and/or FPGA designs. Strong SystemVerilog and UVM skills. Understanding of RTL design principles and hardware implementation. Experience with coverage-driven and assertion-based verification. Linux proficiency and scripting skills (Python ...

enable our partners to develop outstanding systems. Responsibilities Your key responsibilities will include writing test plans, defining test methodologies, developing C based software tests, SystemVerilog/Verilog testbenches and tests, and debugging of test failures and issues. Working with project management and leads on planning tasks, schedules, and reporting progress. … design, implementation, modelling, performance analysis, silicon validation, FPGA and board development. Necessary Skills and Experience Proven understanding of digital hardware verification language Verilog/Systemverilog HDL. Skilled in one or more of various verification approaches – UVM, formal, power aware verification. Experience in SoC verification using Embedded Low-level programming including ...