SoC architecture and performance trade-offs Knowledge of a system modelling/simulation technology, such as SystemC, Gem5, Simics, QEMU and etc Knowledge of Verilog and/or VHDL and experience with simulators and waveform debugging Familiarity with RISC-V architectures and instruction sets Knowledge of script languages The Process more »
/MSc/PhD in Electronics, Microelectronics, Physics or Computer Science Industry experience in digital verification - for FPGA/ASIC (VHDL and/or Verilog, System verilog) Good language & communication skills in English Strong coding skills - python/C/C++/System C UVM environments, libraries and complex test …/validation Matlab/Simulink modelling experience confident software coding skills - C++/python etc formal/software verification - jasper gold, onespin, SVA - system verilog assertions language & communication skills in French more »
You should be a motivated and proactive engineer, able to work well within an independent team and ready to be involved in: VHDL/Verilog/System-Verilog design at RT-Level of core functional blocks Implementation of RTL-to-Syn IC design flow, including timing/power analysis Testbench … design in system-verilog (UVM compliant) Verification of digital IPs using simulation tools at different abstraction level (from RTL to post-layout) Co-simulation of digital and analog IPs to validate the whole mixed-signal system FPGA prototyping of core digital IPs Silicon validation activities with laboratory instrumentation Qualifications and … Physics 3-10+ years related experience Strong knowledge of the CMOS technology, standard logic libraries and manufacturing process Good knowledge of VHDL or Verilog or System-Verilog language Basic knowledge of programming and scripting languages like C++, TCL, bash, Perl Good experience of translating design requirements into RTL description more »
Cambridge, England, United Kingdom Hybrid / WFH Options
Platform Recruitment
chips. Qualifications and Experience: Strong experience in analogue custom IC design. Strong experience with modelling and verification for ASIC implementation. Experience with SystemVerilog and Verilog-A. EDA tool experience for custom analogue IC development like Cadence, Mentor Graphics. more »
SMEs, each specializing in specific project domains We are looking for the following experiences: Proven experience in FPGA design and development, including VHDL or Verilog programming. Proficiency in FPGA development tools such as Vivado, Quartus, or Libero. Strong understanding of digital signal processing (DSP) concepts and algorithms. Familiarity with hardware more »
and help develop digital designs for custom IC integration and design and validate new silicon designs. Experience: Experience in ASIC or FPGA Design Strong Verilog, SystemVerilog experience Python experience CPU architecture is a plus.You will be part of a company where the work environment is stimulating and exciting, as you more »
MSc) in Electronic Engineering or similar A proven background working as a Digital IC Design Engineer, with solid hands-on skills in RTL design - Verilog/SystemVerilog (circa 5-10+ years' experience), and digital-analog integration A good handle on ASIC Verification activities Physical implementation knowledge Excellent communication skills more »
from concept to production. Requirements: Bachelor's degree in Electrical Engineering, Computer Engineering, or related field. Demonstrated experience in FPGA design, including VHDL or Verilog development. Excellent problem-solving skills and attention to detail. Effective communication and teamwork abilities. Benefits: £60,000 - £80,000 Salary and comprehensive benefits package Opportunity more »
and validation. Required Skills and Experience : This role is for a Staff DFT Engineer with proven track record in Design for Test Experience coding Verilog RTL, TCL and/or Perl Proficient in Unix/Linux environments Core DFT skills considered for this position should include some of the following more »
substituted "Nice To Have" Skills and Experience : High-performance, low-latency execution, high area-efficient and power-efficient processor design Hands-on experience using Verilog or VHDL HDL for design Designing for synthesis targeted to achieve specified power, frequency, and area targets Make good judgements on functionality, performance, and physical more »
or GPUs Excellent collaboration skills Outstanding written and verbal communications Preferred Qualifications Proficiency in computer/SoC architecture and performance trade-offs Knowledge of Verilog and/or VHDL and experience with simulators and waveform debugging Familiarity with RISC-V architectures and instruction sets Knowledge of script languages The Process more »
and validation. Required Skills and Experience : This role is for a Staff DFT Engineer with proven track record in Design for Test Experience coding Verilog RTL, TCL and/or Perl Proficient in Unix/Linux environments Core DFT skills considered for this position should include some of the following more »
and algorithms Model checking and/or theorem proving Experience with formal verification techniques (abstractions, constraints, coverage, equivalence checking, etc.) Knowledge of HDL languages (Verilog, SystemVerilog, VHDL) and property languages (SVA, PSL,...) Knowledge of versioning tools (Git -preferred) Practical usage of Linux Proficiency in scripting languages, e.g. Python Communicative more »
and algorithms Model checking and/or theorem proving Experience with formal verification techniques (abstractions, constraints, coverage, equivalence checking, etc.) Knowledge of HDL languages (Verilog, SystemVerilog, VHDL) and property languages (SVA, PSL,...) Knowledge of versioning tools (Git -preferred) Practical usage of Linux Proficiency in scripting languages, e.g. Python Communicative more »
to solve problems. Main Responsibilities Develop digital designs for custom IC integration – this would take the form of writing IP design specifications and coding Verilog and SystemVerilog models for simulation, synthesis and static timing analysis, creating testbenches and writing automated build scripts for simulation and verification. Build automated pre-silicon … in computer science/electronic engineering or equivalent Proven record in digital IC design and verification for ASIC implementation Strong RTL coding skills in Verilog and SystemVerilog with ability to write testbenches for simulation Good knowledge of clock and reset scheme and power domain structure Good knowledge of industry-standard more »
Qualifications: Bachelor's or Master's Degree in relevant field, with 5+ years' work experience in ASIC digital design/development processes. Excellent RTL Verilog or System Verilog coding skills. Knowledge of standard Digital Verification languages (System Verilog, UVM) and metrics. Very good understanding of the backend flow: Synthesis, P more »
Computer Science Industry experience in RTL design/RTL coding/digital design/hardware design - for FPGA/ASIC (VHDL and/or Verilog, System verilog) System design & integration SOC/IP integration for complex embedded processors - ARM/RISC-V Good communication skills in French & English Strong coding … architecture High-speed digital connectivity and protocols - Serdes, ethernet, USB, PCIe, AMBA/AXI, MAC, PHY, cache coherency - MESI Digital Verification (UVM/system verilog) Back-end/physical design/implementation of FPGAs Testing/validation Matlab/Simulink modelling experience more »
Cambridge, East Anglia, United Kingdom Hybrid / WFH Options
Technical Futures
to every phase of a large SoC project for new infrared camera products, from concept through to delivery of a working system. Youll develop Verilog code, work closely with software engineers to help develop drivers and application soft... APCT1_UKTJ more »
projects. Knowledge of RTL design. Knowledge of the full design flow (including some middle end knowledge - STA, Synthesis, etc.) Proficient in a programming language (Verilog, SystemVerilog, etc.) Scripting knowledge (Python or C/C++) Experience leading projects or mentoring junior engineers. If you are interested in finding out more, or more »
projects. Knowledge of RTL design. Knowledge of the full design flow (including some middle end knowledge - STA, Synthesis, etc.) Proficient in a programming language (Verilog, SystemVerilog, etc.) Scripting knowledge (Python or C/C++) Experience leading projects or mentoring junior engineers. If you are interested in finding out more, or more »
than legacy work. Key skills for this position: Experience in RTL design for complex ASIC projects. Completion of multiple successful tape-outs. Experience with Verilog or SystemVerilog. An understanding of FPGA prototyping is a plus. If you are interested in finding out more, or applying for this position, please contact more »
Glasgow, Lanarkshire, Scotland, United Kingdom Hybrid / WFH Options
Verto People
understanding of analogue and digital circuits. Understanding of product design from spec with consideration of DFT and DFM EMC knowledge and experience FPGAs using Verilog Good understanding of test automation tools e.g. LabView Commutable to Glasgow more »
Strong leadership and coordination skills, with a successful track record of building and managing engineering teams In-depth understanding of RTL languages (VHDL/Verilog/SystemVerilog/SystemC/Python) A good understanding of software engineering and architectural principles Strong language skills in both English and FrenchAn excellent salary more »
the market today and in the future. The ideal candidate will have: Proven experience of digital ASIC verification techniques Strong experience in SystemVerilog or Verilog testbench creation Experience with OVM, VMM, UVM methodologies Effective problem solving, communication and team working skills (essential!) This position offers the opportunity to develop new more »
in SoC architectures, with an understanding of trade off analysis based on power, performance and area Experienced within Digital IC Design in VHDL/Verilog Keen to develop and build a career within SoC architecture, with plenty of enthusiasm and creativity Fluent in EnglishOur client really takes care of their more »