to solve problems. Main Responsibilities Develop digital designs for custom IC integration – this would take the form of writing IP design specifications and coding Verilog and SystemVerilog models for simulation, synthesis and static timing analysis, creating testbenches and writing automated build scripts for simulation and verification. Build automated pre-silicon … in computer science/electronic engineering or equivalent Proven record in digital IC design and verification for ASIC implementation Strong RTL coding skills in Verilog and SystemVerilog with ability to write testbenches for simulation Good knowledge of clock and reset scheme and power domain structure Good knowledge of industry-standard more »
Cambridge, England, United Kingdom Hybrid / WFH Options
European Recruitment
required timelines Key Requirements: A minimum of 4 years of relevant industry experience. Extensive expereince in RTL design with strong programming skills in System Verilog, Verilog, or VHDL. Previous expereince working on, and strong technical understanding of, computer architecture. Strong working knowledge of SVAs and proven track record working on … microprocessor designs. Expereince working with CPU/GPU technology is highly beneficial. Keywords: Design Engineer/RTL Design/System Verilog/SystemVerilog/CPU/GPU/Microprocessors/Microarchitecture/Computer Architecture/Semiconductor If you are interested in this Design Engineer position, please send a CV to more »
external partners/customers and our internal development teams. Responsibilities: System Verification: Develop and maintain SoC verification testbench in SystemVerilog. Experience with coding System Verilog Assertions (SVA) checks, cover-properties, SV coverage groups. Programming and debugging C test cases to verify IP integration into the system, including reusing and translating more »
or GPUs Excellent collaboration skills Outstanding written and verbal communications Preferred Qualifications Proficiency in computer/SoC architecture and performance trade-offs Knowledge of Verilog and/or VHDL and experience with simulators and waveform debugging Familiarity with RISC-V architectures and instruction sets Knowledge of script languages The Process more »
Physical Design Implementation Engineer (m/f/d) - CPU/RTL/STA/Verilog/System Verilog As a physical implementation engineer, you will join the successful team that has enabled huge volumes of next-generation high-efficiency processors. If this is, you please continue reading below! Responsibilities … processors whilst focussing on the ideal user experience Qualifications: Good working knowledge of the entire IC design flow and knowledge of hardware description languages: Verilog or System Verilog Expertise in one or more of: synthesis, place and route, LEC and STA An attention to detail and tenacity to identify and … faced at the nanometre-scale meaningful experience in the industry passion and curiosity to grow your expertise Keywords: CPU/RTL/STA/Verilog/System Verilog If you are interested in this Physical Design Implementation Engineer role- please apply below or send a copy of your CV to more »
LinkedIn, or send your CV to george@eu-recruit.com Keywords: Verification/Semiconductor/Semiconductor/Semi-conductor/CPU/GPU/System Verilog/SystemVerilog/Specman/UVM/Universal Verification Methodology/Microprocessor/Microprocessor/C/C++ By applying to this role you understand more »
assembly languages, and/or C/C++ Keywords: Verification/Semiconductor/Semi conductor/Semi-conductor/CPU/GPU/System Verilog/SystemVerilog/Specman/UVM/Universal Verification Methodology/Microprocessor/Micro processor/C/C++ If you are interested in this more »
and Hyperlynx tools Embedded software knowledge to test and debug the design with a creative and structured approach to problem-solving. RTL skills in Verilog or VHDL Use of a UNIX environment and shell programming/scripting in e.g. Tcl, Perl, Python etc Programming languages such as: assembly language (ideally more »
assertions, and developing stimulus Experience in unit and full chip level test benches Knowledge of logic design, simulations and debugging tools Fluent in System Verilog, C/C++, and Python Excellent collaboration skills Outstanding written and verbal communication Preferred Qualifications Knowledge of RISC-V ISA, including vector extension Experience in more »
We’re partnered with a client developing applications within the telecommunications sector, delivering innovative solutions globally. They are looking to add a Senior FPGA Engineer to their design team who will report directly to the system architect. Known as a more »
ownership of the Digital Design process working on complex sub-systems to help deliver excellence. Requirements: Proven experience in 6+ successful tapeouts Fluent in Verilog, System Verilog or VHDL Experience with STA, Synthesis or DFT Knowledge of low power design techniques Experience resolving complex design issues If you would be more »
go-to person for all aspects of FPGA and digital design. Designing and implementing complex digital circuits using hardware description languages (HDLs) such as Verilog or VHDL. Translating system requirements into efficient and performance optimized FPGA implementations. Developing and utilising test benches for comprehensive verification of implemented digital logic. Integrating more »
and analog products. The key skills needed for the Digital Design Engineer are: RTL design experience. Implementation of complex digital circuits and sub-systems. Verilog or System Verilog knowledge. An understanding of digital system-level design, including the use of standard bus protocols, bus architecture design and chip-level clock more »
Bachelor's degree in Electrical/Electronic Engineering or related field. 2 - 10 years of experience in RTL design and verification for FPGAs using Verilog, SystemVerilog, or VHDL. Experience with Vivado/Quartus A Software Engineering and Hardware Engineering background is a plus Desirable Skills: Knowledge of networking protocols, such more »
reviewing design and verification documentation Planning and tracking design tasks to meet the targets at the planned time Qualifications: Hands-on experience using System Verilog, Verilog or VHDL HDL for design Experience in synthesisable design that achieve area, frequency and power targets with the ability to make judgements on functionality more »
continuously improving and developing starting up new projects meaning extra contract resources are needed. Skills Matlab/Simulink FPGA Architecture (Xilinx/Ultrascale) System Verilog/UVM Firmware Requirements/Architecture The company is looking to interview over the next week and start you as quickly as possible If interested more »
the market today and in the future. The ideal candidate will have: Proven experience of digital ASIC verification techniques Strong experience in SystemVerilog or Verilog testbench creation Experience with OVM, VMM, UVM methodologies Effective problem solving, communication and team working skills (essential!) This position offers the opportunity to develop new more »
SoC architecture and performance trade-offs Knowledge of a system modelling/simulation technology, such as SystemC, Gem5, Simics, QEMU and etc Knowledge of Verilog and/or VHDL and experience with simulators and waveform debugging Familiarity with RISC-V architectures and instruction sets Knowledge of script languages The Process more »
Jasper Gold, Siemens EDA QuestaFormal, or Synopsys. Keywords: Formal Verification/Semiconductor/Semi conductor/Semi-conductor/GPU/SystemVerilog/System Verilog Assertions/Property Specification Language/Cadence/JasperGold/Siemens EDA/Synopsys If you are interested in this Formal Verification Engineer position, please more »
Glasgow, Lanarkshire, Scotland, United Kingdom Hybrid / WFH Options
Verto People
understanding of analogue and digital circuits. Understanding of product design from spec with consideration of DFT and DFM EMC knowledge and experience FPGAs using Verilog Good understanding of test automation tools e.g. LabView Commutable to Glasgow more »
