Field-Programmable Gate Arrays Engineer
- Hiring Organisation
- Akkodis
- Location
- United Kingdom
candidates with experience in: RTL design and development using VHDL for FPGA-based systems. Xilinx, AMD or Lattice FPGA architectures. FPGA SoC implementations of algorithms developed within MATLAB/Simulink environments. Verification methodologies including OSVVM, UVVM or UVM. FPGA communication and interface technologies such as AXI, PCIe, Ethernet, OCP, Wishbone ...