programming Experience with embedded development and software test Some knowledge of secure software development is advantageous (secure bootloaders, TrustZone, encryption, cryptography) Knowledge of RISC-V or complex SoCs will also be advantageousPlease note, you must be based in the United Kingdom and have UK working rights to be more »
as SystemC, Gem5, Simics, QEMU and etc Knowledge of Verilog and/or VHDL and experience with simulators and waveform debugging Familiarity with RISC-V architectures and instruction sets Knowledge of script languages The Process Application review > 1st Interview > 2nd Interview (technical) > 3rd Interview more »
debugging tools Fluent in System Verilog, C/C++, and Python Excellent collaboration skills Outstanding written and verbal communication Preferred Qualifications Knowledge of RISC-V ISA, including vector extension Experience in CPU design, Silicon bring up and validation of CPU features Proficiency in computer/SoC architecture and more »
Cambridge, England, United Kingdom Hybrid / WFH Options
European Recruitment
/Microarchitecture/C++ We are currently partnered with a cutting-edge semiconductor startup in the UK working on next-generation CPU/Risc-V technologies. The team is looking to expand its headcount with a Senior Compute Library Engineer to actively contribute to the advancement in capabilities more »
experience in processor verification. Experience in unit and full chip level test benches. Fluent in Systemverilog, C/C++ and Python. Knowledge of RISC-V ISA would be advantageous.Your benefits package will depend on position, but your benefits programme will include industry leading healthcare, annual bonus plan, company more »
experience in processor verification. Experience in unit and full chip level test benches. Fluent in Systemverilog, C/C++ and Python. Knowledge of RISC-V ISA would be advantageous. Your benefits package will depend on position, but your benefits programme will include industry leading healthcare, annual bonus plan more »
from 3 ~ 5 years (ML, linear algebra) Proficiency in CUDA, OpenCL, or similar parallel programming languages Experience in SIMD/vector processing experience(RISC-V Vector) Strong software development skills using standard development tools (e.g., Git, Jira, etc.) Basic understanding of machine learning frameworks (TensorFlow, PyTorch, etc.) Excellent more »
/SoC architecture and performance trade-offs Knowledge of Verilog and/or VHDL and experience with simulators and waveform debugging Familiarity with RISC-V architectures and instruction sets Knowledge of script languages The Process Application review > 1st Interview > 2nd Interview (technical) > 3rd Interview more »
Digital Design Verification - RISC-V ISA - Processor Microarchitecture - CPU - Formal Verification - Model checking - Property checking - SVA - OneSpin - JasperGold- International teams - Start-up culture Locations: France (Villeneuve-Loubet), Germany (Munich), the UK (Bristol/Cambridge), the Czech Republic (Brno, Prague), Barcelona (Spain), Greece (Heraklion/Thessaloniki/Athens) Department … role with the main goal to raise the usage of formal techniques applied to Codasip processors, including Low-Power embedded and High-Performance RISC-V application processors, including multiple-issue and/or multi-core architectures as well as the high-end ones. Our Verification and IP Design … Enable formal verification users to apply standard and advanced methodologies and techniques Contribute to the development of tools Focus on the verification of RISC-V processors and their components to raise the quality of our deliverables Review and support FV test plans YOU NEED TO POSSESS THE FOLLOWING more »
unique competitive advantage by empowering their system-on-chip developers to build the most innovative products. Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language … CodAL, and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions. Our Desing Centers and Sales Offices Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work … efforts with company strategy and objectives. Collaborate with the current Verification lead to share responsibilities, ensuring effective management of workload and resources. Verify RISC-V processors and extensions. Take ownership of IP Verification projects. Be instrumental in deciding company strategy regarding verification. Tackle the challenges unique to Codasip more »
CPU Verification Engineer - RISC-V - AI I am partnered with an incredibly exciting start up who work on AI Accelerators and RISCV technologies, who are looking to bring on a Senior Verification Engineer onto their team in Cambridge on a hybrid basis (2 days per … in Cambridge, which currently has around 20 people. Your profile: 5+ years of experience on IP Verification Good understanding of CPU micro-architecture (RISCV or Arm) Proficiency in computer/SoC architecture and performance trade-offs By applying to this role you understand that we may collect more »
