SystemVerilog Jobs in Central London

6 of 6 SystemVerilog Jobs in Central London

Field-Programmable Gate Arrays Engineer

City of London, London, United Kingdom
Algo Capital Group
CE), Electrical Engineering (EE), Computer Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working with digital simulators and self More ❯
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Field-Programmable Gate Arrays Engineer

london (city of london), south east england, united kingdom
Algo Capital Group
CE), Electrical Engineering (EE), Computer Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working with digital simulators and self More ❯
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FPGA Engineer - Leading Trading Firm

City of London, London, United Kingdom
Capital Markets Recruitment
software technologies that could enhance the firm’s trading capabilities. Ideal Candidates Professional experience in FPGA/ASIC development and digital logic design. Strong proficiency with hardware description languages (SystemVerilog, Verilog, or VHDL). Solid understanding of digital design principles and verification methodologies. Experience with FPGA toolchains and flows for design, synthesis, simulation, and debugging. Knowledge of C++ and familiarity More ❯
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FPGA Engineer - Leading Trading Firm

london (city of london), south east england, united kingdom
Capital Markets Recruitment
software technologies that could enhance the firm’s trading capabilities. Ideal Candidates Professional experience in FPGA/ASIC development and digital logic design. Strong proficiency with hardware description languages (SystemVerilog, Verilog, or VHDL). Solid understanding of digital design principles and verification methodologies. Experience with FPGA toolchains and flows for design, synthesis, simulation, and debugging. Knowledge of C++ and familiarity More ❯
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Senior Design Verification Engineer

City of London, London, United Kingdom
Platform Recruitment
the design team Debug failures, create and track issues to resolution. Develop and maintain automated regression test infrastructure. Requirements Deep expertise in industry-standard verification methodologies, including proficiency with SystemVerilog and UVM. Experience with FPGA systems is desirable. Experience with high-speed protocols (PCIe, SERDES) is desirable. Demonstrated ability to collaborate effectively with design teams to meet objectives. If you More ❯
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Senior Design Verification Engineer

london (city of london), south east england, united kingdom
Platform Recruitment
the design team Debug failures, create and track issues to resolution. Develop and maintain automated regression test infrastructure. Requirements Deep expertise in industry-standard verification methodologies, including proficiency with SystemVerilog and UVM. Experience with FPGA systems is desirable. Experience with high-speed protocols (PCIe, SERDES) is desirable. Demonstrated ability to collaborate effectively with design teams to meet objectives. If you More ❯
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