8 of 8 UVM Jobs in Scotland

Principal Firmware Engineer

Hiring Organisation
Morson Edge
Location
Edinburgh, Grove, Greater London, United Kingdom
Employment Type
Contract
Contract Rate
£0.00 - £102/hour INSIDE IR35
wide FPGA/Firmware delivery teams. Key Skills : • Creating innovative VHDL based FPGA designs • Advanced verification techniques using either VHDL or SystemVerilog/UVM • Current FPGA technologies from either Xilinx, Altera or Microsemi and their tools • Model Driven Engineering tools including MATLAB and Simulink • High Speed Interface Design & Integration, including ...

Principal Silicon Design Verification Engineer

Hiring Organisation
Advanced Micro Devices
Location
Scotland, United Kingdom
Employment Type
Permanent
technical lead in a verification team Proven track record in simulation-based verification for ASIC or FPGA blocks and subsystems. Strong experience in UVM-based verification in SystemVerilog, with a deep understanding of the framework. Experience of verification coverage closure in an ASIC or FPGA project. Strong problem-solving skills. ...

Principal Silicon Design Verification Engineer

Hiring Organisation
Advanced Micro Devices
Location
North East, Glasgow, UK
technical lead in a verification team Proven track record in simulation-based verification for ASIC or FPGA blocks and subsystems. Strong experience in UVM-based verification in SystemVerilog, with a deep understanding of the framework. Experience of verification coverage closure in an ASIC or FPGA project. Strong problem-solving skills. ...

Principal Silicon Design Verification Engineer

Hiring Organisation
Advanced Micro Devices
Location
Dunfermline, Fife, UK
technical lead in a verification team Proven track record in simulation-based verification for ASIC or FPGA blocks and subsystems. Strong experience in UVM-based verification in SystemVerilog, with a deep understanding of the framework. Experience of verification coverage closure in an ASIC or FPGA project. Strong problem-solving skills. ...

Principal Silicon Design Verification Engineer

Hiring Organisation
Advanced Micro Devices
Location
Livingston, West Lothian, UK
technical lead in a verification team Proven track record in simulation-based verification for ASIC or FPGA blocks and subsystems. Strong experience in UVM-based verification in SystemVerilog, with a deep understanding of the framework. Experience of verification coverage closure in an ASIC or FPGA project. Strong problem-solving skills. ...

Principal Firmware Engineer

Hiring Organisation
ARM
Location
Edinburgh, United Kingdom
Employment Type
Contract
Contract Rate
GBP Annual
across FPGA/Firmware teams. Key Responsibilities Design and develop innovative VHDL-based FPGA architectures Apply advanced verification techniques using VHDL or SystemVerilog/UVM Work with currentFPGA technologies from: Xilinx Intel (Altera) Microsemi (semiconductor manufacturer) Develop and integrate high-speed interfaces, including PCIe, DDR3, Ethernet and JESD Analyse system … Intel (Altera), or Microsemi toolchains Experience with fast interfaces such as PCIe, Ethernet, DDR3, JESD Advanced verification experience using VHDL or System Verilog/UVM Proven ability to derive detailed firmware requirements from system-level specifications Experience working within structured firmware processes (e.g., DO-254) Excellent analytical and problem-solving ...

Senior Silicon Design Engineer

Hiring Organisation
Advanced Micro Devices
Location
Glasgow, UK
Employment Type
Full-time
profile Qualifications Degree or better in Electronic Engineering, Computer science, or related subject Skills and Experience Experience in Verilog/SystemVerilog (essential) UVM (Universal Verification Methodology) is a must-have, experience with Formal Verification would be an advantage Experience in C/C++, Python, Perl, TCL for scripting and testbench ...

Senior Silicon Design Engineer

Hiring Organisation
Advanced Micro Devices
Location
North East, Glasgow, UK
profile Qualifications Degree or better in Electronic Engineering, Computer science, or related subject Skills and Experience Experience in Verilog/SystemVerilog (essential) UVM (Universal Verification Methodology) is a must-have, experience with Formal Verification would be an advantage Experience in C/C++, Python, Perl, TCL for scripting and testbench ...