1 to 25 of 194 VHDL Jobs

Senior Microelectronics Hardware Design Engineer

El Cajon, California, United States
Leidos
solder), chip interconnect (chiplet, flipchip, wire/ribbon bonding), modeling & simulation (power, speed, timing, signal integrity, thermal, structural, reliability) • Hardware Programming: FPGA (i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: • 8+ years experience in leading a design team • Experience in hardware test and more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Senior Microelectronics Hardware Design Engineer

National City, California, United States
Leidos
solder), chip interconnect (chiplet, flipchip, wire/ribbon bonding), modeling & simulation (power, speed, timing, signal integrity, thermal, structural, reliability) • Hardware Programming: FPGA (i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: • 8+ years experience in leading a design team • Experience in hardware test and more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Senior Microelectronics Hardware Design Engineer

La Jolla, California, United States
Leidos
solder), chip interconnect (chiplet, flipchip, wire/ribbon bonding), modeling & simulation (power, speed, timing, signal integrity, thermal, structural, reliability) • Hardware Programming: FPGA (i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: • 8+ years experience in leading a design team • Experience in hardware test and more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Senior Microelectronics Hardware Design Engineer

San Diego, California, United States
Leidos
solder), chip interconnect (chiplet, flipchip, wire/ribbon bonding), modeling & simulation (power, speed, timing, signal integrity, thermal, structural, reliability) • Hardware Programming: FPGA (i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: • 8+ years experience in leading a design team • Experience in hardware test and more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Senior Microelectronics Hardware Design Engineer

Chula Vista, California, United States
Leidos
solder), chip interconnect (chiplet, flipchip, wire/ribbon bonding), modeling & simulation (power, speed, timing, signal integrity, thermal, structural, reliability) • Hardware Programming: FPGA (i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: • 8+ years experience in leading a design team • Experience in hardware test and more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Senior Microelectronics Hardware Design Engineer

Cardiff By The Sea, California, United States
Leidos
solder), chip interconnect (chiplet, flipchip, wire/ribbon bonding), modeling & simulation (power, speed, timing, signal integrity, thermal, structural, reliability) • Hardware Programming: FPGA (i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: • 8+ years experience in leading a design team • Experience in hardware test and more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Senior Microelectronics Hardware Design Engineer

Rancho Santa Fe, California, United States
Leidos
solder), chip interconnect (chiplet, flipchip, wire/ribbon bonding), modeling & simulation (power, speed, timing, signal integrity, thermal, structural, reliability) • Hardware Programming: FPGA (i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: • 8+ years experience in leading a design team • Experience in hardware test and more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Senior FPGA DSP Firmware Design Engineer

Saint Petersburg, Florida, United States
Leidos
latest System on a Chip (SoC) implementations such as Xilinx Zynq Ultrascale+, Intel Stratix-10, and Xilinx RFSoC. • Proficiency in hardware descriptor languages, HDL (VHDL, Verilog) and/or MATLAB model(s). • Ability to perform design constraints generation and verification as well as evaluate synthesis and timing performance reports. more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Senior Design Verification Engineer (PCIe / Serdes / USB / ethernet)

Lausanne, Lausanne District, Vaud
IC Resources
skills: University degree - BSc/MSc/PhD in Electronics, Microelectronics, Physics or Computer Science Industry experience in digital verification - for FPGA/ASIC (VHDL and/or Verilog, System verilog) Good language & communication skills in English Strong coding skills - python/C/C++/System C UVM environments more »
Employment Type: Permanent
Posted:

FPGA Design Engineer

Saffron Walden, Essex, South East, United Kingdom
Hybrid / WFH Options
Technical Futures
radar signal processing techniques. The FPGA Design engineer will take the lead on DSP system design and architecture; will design and verify FPGA code (VHDL or Verilog) using Xilinx design tools as well as designing software for test and verification. Skills Summary for the FPGA Engineer includes: A Technical Degree more »
Employment Type: Permanent, Work From Home
Salary: £65,000
Posted:

Field-Programmable Gate Arrays Engineer

England, United Kingdom
Damia Group
problem-solving skills Broad interest in wireless technology, embedded systems and awareness of latest industry developments. Desirable: 1+ year experience of FPGA development (eg VHDL). Understanding of radio communications Understanding of digital signal processing Development on Linux based systems Range of software development experience including MATLAB, C++, Python Understanding more »
Posted:

Firmware Engineer

England, United Kingdom
Damia Group
to learn quickly Ability to produce high-quality FPGA designs Understanding of FPGA and SoC architectures Desirable: 1+ year experience of FPGA development (eg VHDL). Understanding of radio communications Understanding of digital signal processing Development on Linux based systems Range of software development experience including MATLAB, C++, Python Understanding more »
Posted:

FPGA Design Engineer

Derby, Derbyshire, East Midlands, United Kingdom
JAM Recruitment Ltd
lifecycle to deliver customer requirements by: Developing high-level firmware requirements using DOORS, Creating architectural designs, Defining low level requirements and detailed designs, Writing VHDL and Verilog HDL code using Sigasi Studio, Simulating HDL designs at unit, integration and system level using Mentor Graphics QuestaSIM, Undertaking synthesis, place and route more »
Employment Type: Permanent
Posted:

Senior Hardware Design (R&D - ASIC / FPGA / digital architecture)

Valbonne, Alpes-Maritimes, Provence-Alpes-Côte d'Azur
IC Resources
Electronics, Microelectronics, Physics or Computer Science Industry experience in RTL design/RTL coding/digital design/hardware design - for FPGA/ASIC (VHDL and/or Verilog, System verilog) System design & integration SOC/IP integration for complex embedded processors - ARM/RISC-V Good communication skills in more »
Employment Type: Permanent
Posted:

Senior Embedded Firmware Developer

Huntsville, Alabama, United States
Leidos
Developing overall firmware/software architecture for embedded systems, including FPGAs and SoCs Experience with programming and/or hardware description languages such as: VHDL, Verilog. Utilizing modern Xilinx FPGA and SoC families and design tools (Xilinx IP Cores, AXI4, AXI-Stream) Firmware testing and verification (unit testing, testbenching, HWIL more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Microelectronics Design Engineer

Saint Petersburg, Florida, United States
Leidos
solder), chip interconnect (chiplet, flipchip, wire/ribbon bonding), modeling & simulation (power, speed, timing, signal integrity, thermal, structural, reliability) Hardware Programming: FPGA (i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: 8+ years experience in leading a design team Experience in hardware test and more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Microelectronics ASIC Design Engineer

Arlington, Virginia, United States
Leidos
solder), chip interconnect (chiplet, flipchip, wire/ribbon bonding), modeling & simulation (power, speed, timing, signal integrity, thermal, structural, reliability) Hardware Programming: FPGA (i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: 8+ years experience in leading a design team Experience in hardware test and more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Microelectronics ASIC Design Engineer

San Diego, California, United States
Leidos
solder), chip interconnect (chiplet, flipchip, wire/ribbon bonding), modeling & simulation (power, speed, timing, signal integrity, thermal, structural, reliability) Hardware Programming: FPGA (i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: 8+ years experience in leading a design team Experience in hardware test and more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Microelectronics ASIC Design Engineer

Saint Petersburg, Florida, United States
Leidos
solder), chip interconnect (chiplet, flipchip, wire/ribbon bonding), modeling & simulation (power, speed, timing, signal integrity, thermal, structural, reliability) Hardware Programming: FPGA (i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: 8+ years experience in leading a design team Experience in hardware test and more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Microelectronics ASIC Design Engineer

El Cajon, California, United States
Leidos
solder), chip interconnect (chiplet, flipchip, wire/ribbon bonding), modeling & simulation (power, speed, timing, signal integrity, thermal, structural, reliability) Hardware Programming: FPGA (i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: 8+ years experience in leading a design team Experience in hardware test and more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Microelectronics ASIC Design Engineer

National City, California, United States
Leidos
solder), chip interconnect (chiplet, flipchip, wire/ribbon bonding), modeling & simulation (power, speed, timing, signal integrity, thermal, structural, reliability) Hardware Programming: FPGA (i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: 8+ years experience in leading a design team Experience in hardware test and more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Microelectronics ASIC Design Engineer

Chula Vista, California, United States
Leidos
solder), chip interconnect (chiplet, flipchip, wire/ribbon bonding), modeling & simulation (power, speed, timing, signal integrity, thermal, structural, reliability) Hardware Programming: FPGA (i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: 8+ years experience in leading a design team Experience in hardware test and more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Microelectronics ASIC Design Engineer

La Jolla, California, United States
Leidos
solder), chip interconnect (chiplet, flipchip, wire/ribbon bonding), modeling & simulation (power, speed, timing, signal integrity, thermal, structural, reliability) Hardware Programming: FPGA (i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: 8+ years experience in leading a design team Experience in hardware test and more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Microelectronics ASIC Design Engineer

Cardiff By The Sea, California, United States
Leidos
solder), chip interconnect (chiplet, flipchip, wire/ribbon bonding), modeling & simulation (power, speed, timing, signal integrity, thermal, structural, reliability) Hardware Programming: FPGA (i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: 8+ years experience in leading a design team Experience in hardware test and more »
Employment Type: Permanent
Salary: USD Annual
Posted:

Microelectronics ASIC Design Engineer

Rancho Santa Fe, California, United States
Leidos
solder), chip interconnect (chiplet, flipchip, wire/ribbon bonding), modeling & simulation (power, speed, timing, signal integrity, thermal, structural, reliability) Hardware Programming: FPGA (i.e. Verilog, VHDL), Programming (Linux command line/scripting, Python, Java, and C++) Preferred Qualifications: 8+ years experience in leading a design team Experience in hardware test and more »
Employment Type: Permanent
Salary: USD Annual
Posted:
VHDL
10th Percentile
£37,500
25th Percentile
£43,500
Median
£55,000
75th Percentile
£70,000
90th Percentile
£72,500