have" skills: Industry experience in RTL design/RTL coding/digital design/hardware design - for FPGA/ASIC (VHDL and/or Verilog, System verilog) Digital Verification (UVM/system verilog) OR Formal verification methods - Jasper Gold, C/system C Definition of complex architecture High-speed digital connectivity and protocols - Fabric, Serdes, ethernet, USB, PCIe, AMBA/ More ❯
across block-level and system-level designs Core skills Strong commercial experience in functional verification , with ownership of verification strategy and planning Expertise in testbench design using frameworks like UVM or OVM Proficiency with SystemVerilog assertions (SVA) Familiarity with multiple programming languages (e.g., C, C++, Python ) Visa sponsorship will be provided for candidates who require. Please note, you must already More ❯
Cambridge, Cambridgeshire, England, United Kingdom
MicroTECH Global Ltd
cores, OTBN (cryptographic CPU), AES accelerators, and peripherals like USB, I2C, and SPI. Key Responsibilities Design, implement, and debug block/system-level tests and testbenches using SystemVerilog and UVM Develop test and coverage plans for new and updated designs Triage and debug nightly regressions Review contributions to open-source projects Enhance test and CI infrastructure Collaborate on academic/… industry publications Stay current with verification best practices and introduce improvements Candidate Requirements Essential: 5+ years industry experience in design verification Strong SystemVerilog and UVM expertise Experience across the full verification cycle (planning to tape-out) Able to provide estimates and coordinate with project managers Comfortable in multidisciplinary, multi-organisation teams Familiar with Git and code review tools (GitHub, GitLab More ❯