101 to 113 of 113 Field-Programmable-Gate-Array Jobs in the East of England

FPGA Engineer - RF PHY (NB-IoT/Cellular/Space Systems) Location: Hybrid (On-site in Cambridge + Remote Flexibility) Contract: Full-Time, 6 months Clearance Required: Baseline Security (BS) Rate: Competitive We are currently seeking a skilled FPGA Engineer to join a leading-edge project focused on RF physical layer development for NB-IoT, cellular, and space-based communication … on-site work required at the client's facility in Cambridge . Key Responsibilities: Design, implement, and test RF PHY components for NB-IoT or similar comms systems on FPGA platforms Develop digital baseband processing blocks (modulation, filtering, synchronization, coding/decoding) Collaborate with internal and client-side teams for integration and system-level debugging Essential Skills & Experience: Proven experience More ❯

serve as a Hardware Design Lead. In this dual role, youll join a dynamic team of analogue and digital electronics engineers, leading the design and development of advanced MPSoC FPGA and AI-based hardware solutions. These systems support cutting-edge applications in s.../span/p p span style="" br//span/p div br// More ❯

assertions, and bug resolution Collaborate with design, architecture, and software teams Mentor junior engineers and guide verification best practices Requirements: 6+ years in digital Design, with leadership experience Experience FPGA Excellent problem-solving and communication skills Desirable: Familiarity with RISC-V or AI/GPU architectures If you could be interested, please get in touch with me on the details More ❯

distributed RDF system project. Knowledge and experience of the following is highly desirable: High dynamic range broadband radio receiver design SDR and hybrid analogue/SDR design DSP (including FPGA)devices and algorithms Signal search and identification Radio propagation Radio noise and interference The Candidate The ideal candidate will: be very familiar with both the analogue and DSP aspects of More ❯

Responsibilities: Define SoC and subsystem performance and analysis requirements. Collaborate with other system architects, system designers, IP teams and analysis teams. Engage with specialists across Arm, from modelling, RTL, FPGA, Silicon and software Explore and challenge the limits of IP and system performance capabilities. Required Skills and Experience : At least 4 years SoC architecture, SoC and/or SW performance More ❯

silicon and coding techniques. We are seeking an accomplished Engineering Manager with excellent project and people management skills coupled with a strong technical understanding of high speed electronics and FPGA-based development. To succeed in this role, you will be pragmatic and collaborative by nature, with strong organisational skills and the ability to foster communication between the development teams and … experience to call upon, you naturally prefer a more co-operative approach and value others’ input. A solid academic background and strong knowledge of high speed electronics design and FPGA development. Full existing UK work permission. Not essential, but experience within the semiconductor devices industry would be a bonus. The company is driven by success, but moreover by the ability … The team is based in modern offices in Cambridge, and remote working is available for up to two days per week. Keywords: Project Management, People Management, High Speed Electronics, FPGA Another top job from ECM, the high-tech recruitment experts. Even if this job's not quite right, do contact us now - we may well have the ideal job for More ❯

silicon and coding techniques. We are seeking an accomplished Engineering Manager with excellent project and people management skills coupled with a strong technical understanding of high speed electronics and FPGA-based development. To succeed in this role, you will be pragmatic and collaborative by nature, with strong organisational skills and the ability to foster communication between the development teams and … experience to call upon, you naturally prefer a more co-operative approach and value others' input. A solid academic background and strong knowledge of high speed electronics design and FPGA development. Full existing UK work permission. Not essential, but experience within the semiconductor devices industry would be a bonus. The company is driven by success, but moreover by the ability More ❯

full time basis. The work of the whole ASIC team includes: Architecture, tradeoffs with software/hardware RTL design IP selection and integration Verification at block and system level FPGA platforms for software development and extended verification Implementation including DFT, Synthesis, Place and Route, Timing closure and Signoff checks Package definition and working with assembly partners Validation and characterisation Test More ❯

Copello are assisting a leading defence consultancy in the recruitment of anFPGA Engineer to lead the engineering activities within their clients Integrated FPGA Product Team .As a key member of their team, you will be responsible for defining and leading work packages, managing a team of FPGA engineers, and ensuring the successful delivery of project outcomes click apply for full More ❯

Experience focused on novel semiconductor devices or training ML models is not particularly relevant for this role. It should be possible to take someone with extensive experience of using FPGA tools and provide them the necessary training to use the ASIC tools. The team at Cambridge consists of three investigators: Prof. Robert Mullins (PI), Prof. Timothy Jones and Dr Rika More ❯

Experience focused on novel semiconductor devices or training ML models is not particularly relevant for this role. It should be possible to take someone with extensive experience of using FPGA tools and provide them the necessary training to use the ASIC tools. The team at Cambridge consists of three investigators: Prof. Robert Mullins (PI), Prof. Timothy Jones and Dr Rika More ❯

Responsibilities: Define SoC and subsystem performance and analysis requirements. Collaborate with other system architects, system designers, IP teams and analysis teams. Engage with specialists across Arm, from modelling, RTL, FPGA, Silicon and software Explore and challenge the limits of IP and system performance capabilities. Required Skills and Experience : At least 4 years SoC architecture, SoC and/or SW performance More ❯

hierarchical DFT, scan insertion, and ATPG compression techniques. Create and maintain STA DFT constraints and guide synthesis efforts for optimal test coverage. Collaborate closely with RTL design, IP integration, FPGA development, and physical design teams. Set up and run test pattern generation (ATPG) and debug simulation environments. Work with advanced EDA tools for simulation (both behavioral and gate More ❯