Job Description Job Title: UVM VerificationEngineer Job Type: Contract Duration: 6 months initial Location: UK/Remote Start: ASAP For our UK based client we require a VerificationEngineer to join on an initial 6 month basis. The successful engineer will join an established team on a project ramp-up. Required Skills - Strong Verification background, preferably at IP/Module level - Expertise in hardware verification languages in particular SV UVM methodology - Available to work on long-term contract (at least one year) - An interest in creating re-usable Verification IP, following guidelines for code and structure - A good listener who will gain a clear knowledge of what is required and is … previous problems and aiming for continuous improvement Preferred Skills - Experience with scripting (especially Python), - Experience with emulation friendly testbenches, - Experience with UPF (Unified Power Format). - Experience of CPU VerificationMore ❯
Hertfordshire, England, United Kingdom Hybrid / WFH Options
microTECH Global LTD
Role: ASIC VerificationEngineer Location: Hemel Hempstead, UK (Hybrid Preferred | Remote Considered) Contract: Long-Term | Outside IR35 Rate: Competitive/Negotiable About the Company: This is a forward-thinking technology company developing ground-breaking silicon IP solutions that span compute, AI, graphics, memory, communications, and security. These IPs will form the backbone of future innovations across a wide … next-generation silicon IP. The role offers a chance to contribute to industry-leading ASIC and SoC solutions in a dynamic, fast-paced environment. Key Skills & Experience Sought: Digital verification with SystemVerilog, UVM, or cocotb Computer architecture knowledge (ARM or RISC-V) Formal verification techniques Interconnect protocols: AXI or OCP ASIC design tool flows Exposure to OpenGL or More ❯
Analog Mixed Signal VerificationEngineer Job Description: Verification of Mixed-Signal or SoC automotive ASICs Analog/Mixed-Signal self-checking simulation Implementation of analog models in Verilog-/VHDL-AMS to accelerate AMS simulation Application of metric-driven Verification (MDV) methodologies Development and management of Verification plans Integration of Verification IP Measurement and … analysis of regression results Collaboration on silicon evaluation, test correlation, and scripting (Perl, Python, C++) Work with verification team on verification plans, test cases, and analysis of test results More ❯
real world. Our fifth-generation Spectacles, powered by Snap OS, showcase how standalone, see-through AR glasses make playing, learning, and working better together. We're looking for a VerificationEngineer to join the Mechanical Design Team at Snap Inc! What you'll do: As part of the Mechanical Design team you will work directly with engineers, suppliers More ❯
Analysis of the Job Description 1. Formatting: The description uses appropriate HTML tags such as p , h3 , ul , and li to organize content clearly. However, there are some redundant p tags around form fields and unnecessary br tags, which could More ❯