We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through … verifying functionality in the design phase to catch bugs early in the development cycle. Working independently with sales, R&D, and other field AE teams to ensure customer and Synopsys goals are met. Creating and examining functional coverage and writing SystemVerilog assertions. Debugging RTL and gate-level simulation failures and firmware. Tracking bugs using software tools such as Jira and … to reliable and high-quality products. Identifying and rectifying bugs early in the development cycle, reducing costs and time to market. Collaborating across teams to drive innovation and achieve Synopsys' goals. Enhancing customer satisfaction through successful consulting and support. Contributing to the development of cutting-edge technologies in the semiconductor industry. Potentially growing into a leadership role, shaping the future More ❯
Required Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. (PLUS) Proven experience with formal verification tools (e.g., Cadence JasperGold, Synopsys VC Formal, or equivalent tools). Hands-on experience with RTL design such as Verilog, SystemVerilog, or VHDL. Experience with verification methodologies such as UVM (Universal Verification Methodology) or other More ❯
verification. Proficiency in RTL design techniques, including synthesis, timing closure, and verification. Experience in using UVM for functional verification of ASIC designs. Experience with EDA tools like Cadence and Synopsys for design simulation and verification. Experience with FPGA emulation, design tools, and verification desirable Additional Information: Cadence is committed to equal employment opportunity and employment equity throughout all levels of More ❯
are internationally renowned researchers from UCL and Oxford University who have pioneered the development of qubits and quantum computing architectures. Our chairman is the co-founder of Cadence and Synopsys, the two leading companies in the area of Electronic Design Automation. We're backed by a team of top-tier investors including Bosch Ventures, Porsche SE, Sony Innovation Fund, Oxford More ❯
Oxford, England, United Kingdom Hybrid / WFH Options
IC Resources
include.. A Bachelor’s degree in Electronic Engineering or similar Knowledge of EITHER - Custom IC design flows using Cadence Virtuoso platform OR - Digital IC design flows using Cadence or Synopsys platforms Knowledge of custom and digital design flows Scripting experience in Linux/unix, python, Skill, TCL or other Candidates must be eligible to work in the UK to apply More ❯
within ASIC or SoC development flows. Hands-on expertise in scan stitching, ATPG, boundary scan, on-chip clocking , and DFT partitioning . Proficient in using modern DFT tools (e.g., Synopsys, Cadence, or Mentor platforms). Solid understanding of RTL design , STA , and silicon test methodologies . A proactive, solution-oriented mindset and excellent collaboration skills. For more information please contact More ❯
Strong understanding of Place & Route flow. Preferred Qualifications Deep understanding of Physical construction and Integration. Knowledge of Physical Design Verification (LVS/DRC). Familiarity with EDA tools like Synopsys, Cadence. Good teamwork, self-learning skills, and ability to work independently. Learn More Cisco Silicon One Overview Fortune Article on Cisco Silicon One Calcalist Article Cisco Silicon One on YouTube More ❯
Qualifications Deep understanding of all aspects of Physical construction and Integration. Knowledge of Physical Design Verification methodologies (LVS/DRC). Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.). Great teammate, self-learning skills, and ability to work autonomously. Learn More About Us Here: Cisco Silicon One Overview Fortune Article on Cisco Silicon One Calcalist Article More ❯
Advantageous Qualifications Deep understanding of all aspects of Physical construction and Integration. Knowledge in Physical Design Verification methodology LVS/DRC. Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.). Great teammate, self-learning skills, and ability to work autonomously. , where each person is unique, but together we bring our talents to work as a team and More ❯
Fixed-term: The funds for this post are available until 30 September 2027. Applications are invited for a full-time Research Assistant/Associate to work on the design and implementation of next-generation AI hardware (ASIC) accelerators. The UK More ❯
Fixed-term: The funds for this post are available until 30 September 2027. Applications are invited for a full-time Research Assistant/Associate to work on the design and implementation of next-generation AI hardware (ASIC) accelerators. The UK More ❯
and package-level; preferred to have GaN experiences as well. A good understanding of statistical analysis and design of experiments Knowledge of semiconductor TCAD tools for device simulation, i.e. Synopsys Sentaurus, Silvaco Victory Background in electronics engineering for system understanding in the field of power electronics. Excellent problem-solving skills – able to identify problems and/or opportunities for improvement More ❯
and package-level; preferred to have GaN experiences as well. A good understanding of statistical analysis and design of experiments Knowledge of semiconductor TCAD tools for device simulation, i.e. Synopsys Sentaurus, Silvaco Victory Background in electronics engineering for system understanding in the field of power electronics. Excellent problem-solving skills – able to identify problems and/or opportunities for improvement More ❯
and package-level; preferred to have GaN experiences as well. A good understanding of statistical analysis and design of experiments. Knowledge of semiconductor TCAD tools for device simulation, i.e. Synopsys Sentaurus, Silvaco Victory. Background in electronics engineering for system understanding in the field of power electronics. Excellent problem-solving skills – able to identify problems and/or opportunities for improvement More ❯
occasionally Go) to expose DevSecOps capabilities. Package and deploy services to OpenShift/Kubernetes clusters, ensuring scalability and high availability. DevSecOps Toolchain Integration Integrate with and extend APIs for Synopsys BlackDuck, Snyk, OWASP Dependency-Track, JFrog Artifactory, HashiCorp Vault/CyberArk, and more. Drive continuous improvement of our CI pipelines (Jenkins, TeamCity, Tekton), embedding security "shift-left" practices. Developer Enablement More ❯
Luton, Bedfordshire, United Kingdom Hybrid / WFH Options
Leonardo UK Ltd
UK or abroad for technical reviews. What we need from you You should have experience in most of the below Design techniques using one or more of VPI, Ansys, Synopsys or similar simulation tool. Physical realisation of Photonics circuits or spread benches Derivation of and reporting against design requirements A structured approach to design Photonic test methods and equipment. Including More ❯
IAST, RASP, CSPM, API Security, and more. Experience with at least one scripting language. Hands-on experience with AppScan or other application security products (Snyk, Checkmarx, Invicti, OpenText (Fortify), Synopsys, Sonatype, Imperva, F5, Burp Suite, etc.). Strong understanding of developer methodologies, DevOps trends, and best practices. Primary Products: AppScan AppScan on Cloud Travel Requirements: Up to 50% travel may More ❯