26 to 41 of 41 Tcl Jobs in the UK

SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills – RTL – Testbench, OOP – Gate level (including SDF) Scripting experience with Ruby, sh/csh, TCL, Make, Perl Power aware verification (using CPF/UPF) This position is based in Edinburgh. This is a hybrid remote position and will follow a 2+ day in-office work More ❯

design, ideally including work at 7nm or below Practical knowledge of timing closure, clock tree design, physical verification, and sign-off processes Strong scripting/programming ability (e.g. Python, Tcl) Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/ More ❯

design, ideally including work at 7nm or below Practical knowledge of timing closure, clock tree design, physical verification, and sign-off processes Strong scripting/programming ability (e.g. Python, Tcl) Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/ More ❯

design, ideally including work at 7nm or below Practical knowledge of timing closure, clock tree design, physical verification, and sign-off processes Strong scripting/programming ability (e.g. Python, Tcl) Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/ More ❯

SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills – RTL – Testbench, OOP – Gate level (including SDF) Scripting experience with Ruby, sh/csh, TCL, Make, Perl Power aware verification (using CPF/UPF) This position is based in Edinburgh. This is a hybrid remote position and will follow a 2+ day in-office work More ❯

SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills – RTL – Testbench, OOP – Gate level (including SDF) Scripting experience with Ruby, sh/csh, TCL, Make, Perl Power aware verification (using CPF/UPF) This position is based in Edinburgh. This is a hybrid remote position and will follow a 2+ day in-office work More ❯

SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills – RTL – Testbench, OOP – Gate level (including SDF) Scripting experience with Ruby, sh/csh, TCL, Make, Perl Power aware verification (using CPF/UPF) This position is based in Edinburgh. This is a hybrid remote position and will follow a 2+ day in-office work More ❯

power design, high-speed interfaces (e.g., HBM, DDR5, PCIe), and standard on-chip protocols. Experience with microarchitecture exploration, performance modelling, and power optimisation techniques. Scripting ability in Python or TCL to automate design and analysis workflows. This is a superb opportunity to shape next-generation AI hardware from the ground up, working with a passionate team that values innovation, technical More ❯

power design, high-speed interfaces (e.g., HBM, DDR5, PCIe), and standard on-chip protocols. Experience with microarchitecture exploration, performance modelling, and power optimisation techniques. Scripting ability in Python or TCL to automate design and analysis workflows. This is a superb opportunity to shape next-generation AI hardware from the ground up, working with a passionate team that values innovation, technical More ❯

power design, high-speed interfaces (e.g., HBM, DDR5, PCIe), and standard on-chip protocols. Experience with microarchitecture exploration, performance modelling, and power optimisation techniques. Scripting ability in Python or TCL to automate design and analysis workflows. This is a superb opportunity to shape next-generation AI hardware from the ground up, working with a passionate team that values innovation, technical More ❯

power design, high-speed interfaces (e.g., HBM, DDR5, PCIe), and standard on-chip protocols. Experience with microarchitecture exploration, performance modelling, and power optimisation techniques. Scripting ability in Python or TCL to automate design and analysis workflows. This is a superb opportunity to shape next-generation AI hardware from the ground up, working with a passionate team that values innovation, technical More ❯

test sequences/scripts for execution of spacecraft tests from the Central Checkout System (CCS) Spacecraft systems and subsystem technical knowledge Programming and scripting languages such asC, Java, python, TCL, VBA Knowledge of system testing & Verification The Benefits: Hourly rate circa £55 via Umbrella company Training and Development Does this sound like your next career move? Apply today. Working with More ❯

knowledge of synthesis, constraints development, timing closure, power intent, and verification of implementation flows. Hands-on experience with industry-standard tools for physical implementation and sign-off. Scripting ability (TCL/Make essential; Python/Verilog Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - **https://www.linkedin.com/in/jordan-browne-b4a08b20b/ More ❯

knowledge of synthesis, constraints development, timing closure, power intent, and verification of implementation flows. Hands-on experience with industry-standard tools for physical implementation and sign-off. Scripting ability (TCL/Make essential; Python/Verilog desirable). Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/ More ❯

knowledge of synthesis, constraints development, timing closure, power intent, and verification of implementation flows. Hands-on experience with industry-standard tools for physical implementation and sign-off. Scripting ability (TCL/Make essential; Python/Verilog desirable). Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/ More ❯

Design Verification Engineers — Next-Generation AI ASICs Cambridge or Edinburgh An innovative fabless semiconductor start-up is developing cutting-edge AI accelerator chips designed to deliver an order-of-magnitude performance improvement while dramatically reducing power consumption. I am seeking More ❯