1 to 25 of 41 ASIC Jobs in the UK excluding London

s Solution Engineering FPGA Design team on a permanent basis. The team is based in Cambridge UK, working at the forefront of Arm based embedded design. The team delivers ASIC prototypes on FPGA platforms, internally and externally, in support Arm's IP business model, based around Arm's leading CPU and system IP solutions. These platforms are used for software … partners/customers. The role will involve building an understanding of incoming Arm IP RTL designs and making the relevant design changes to implement an FPGA prototype of this ASIC RTL, on FPGA. You'll be part of a project team responsible for delivery of the prototype, creating FPGA prototypes for enablement and validation, working collaboratively with other teams in … and structured approach to problem-solving with excellent communications skills, written and spoken English; ability to write coherent documentation. "Nice To Have" Skills and Experience: Demonstrate an understanding of ASIC/SoC prototyping in FPGA. Working with the latest Xilinx UltraScale+ devices and tools. Knowledge/Experience of implementation of FPGA peripherals such as DDR memory, PCIe and high speed More ❯

of this team, your role will involve building an understanding of incoming Arm IP RTL & SoC designs and making the relevant design changes to implement a prototype of this ASIC RTL on FPGA. This includes RTL integration, design, modifications, simulation/verification and validation on hardware of FPGA specific IPs and peripherals into the larger SoC prototype. You'll … against a plan and have a strong focus on engineering efficiency and quality . Responsibilities: Development and verification of subsystems, peripherals, and IPs used for FPGA prototyping purposes. Modifying ASIC RTL from sophisticated systems to target a dedicated FPGA prototyping platform. Debugging of test failures and issues by working in collaboration with the design teams and FPGA users. Required Skills … scripting languages. "Nice To Have" Skills and Experience: Exposure to the FPGA design flow from RTL design, simulation, synthesis , place & route, constraints, and timing closure. Demonstrate an understanding of ASIC/SoC prototyping in FPGA. Programming languages such as: assembly language (ideally Arm assembler), higher-level (e.g. C), object-orientated (e.g. C++). Use of a UNIX environment and shell More ❯

with colleagues in the verification teams, modelling teams, software driver developers, multimedia architects and imaging researchers. Mentor & support other members of the team Required skills and experience: Experience in ASIC RTL design, ideally for Multimedia IP (ISPs, DPUs, VPUs) or related IP (CPU, GPU, interconnect, memory controllers, high-performance peripherals). Proficiency in System Verilog, Verilog or VHDL. Exposure to More ❯

You will also identify areas for improvement in processes and methodologies, then implement those changes to advance our best-practises for hardware design. Required Skills and Experience : Experience of ASIC RTL design, preferably for ISP, processor design (CPU or GPU) or related IP (interconnect, memory controllers, high-performance peripherals) Experience of Verilog, System Verilog or VHDL Exposure to all stages More ❯

reduce power. Documentation including micro architecture and programming guides. Ownership of complete work package from specification through to delivery. Cross functional collaboration with Firmware, Systems and Verification teams. Running ASIC development tools including Lint, CDC, Synthesis, Power analysis tools. Planning, reporting status and communicating progress against expectations. Required Competencies Effective communicator with strong technical presentation skills. RTL design in System More ❯

reduce power. Documentation including micro architecture and programming guides. Ownership of complete work package from specification through to delivery. Cross functional collaboration with Firmware, Systems and Verification teams. Running ASIC development tools including Lint, CDC, Synthesis, Power analysis tools. Planning, reporting status and communicating progress against expectations. Required Competencies Effective communicator with strong technical presentation skills. RTL design in System More ❯

reduce power. Documentation including micro architecture and programming guides. Ownership of complete work package from specification through to delivery. Cross functional collaboration with Firmware, Systems and Verification teams. Running ASIC development tools including Lint, CDC, Synthesis, Power analysis tools. Planning, reporting status and communicating progress against expectations. Required Competencies Effective communicator with strong technical presentation skills. RTL design in System More ❯

Senior Hardware Design Engineer, you will: - Work closely with the Algorithm team to understand requirements and translate them into architectures for RTL implementations Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of UVM based testbenches Deploy your designs onto the latest FPGA development platforms for validation and system integration Actively engage with and adhere … efficiency and quality for both the design flow and the final product Collaborate with colleagues across the whole design flow: micro-architecture, design, verification, physical implementation and optimisation for ASIC and FPGA Skills, Knowledge and Expertise Essential: Expert knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivering digital designs in the … ASIC and FPGA industry Optimisation of timing and hardware resources for high throughput data or signal processing applications. Experience in power management techniques, synthesis and timing analysis Track record in collaborating across teams to produce integrated solutions Experience in technical documentation writing - design specifications, user guides, verification plans Expert user of EDA tools for simulation and synthesis Desirable: Knowledge More ❯

electronics, physics, or similar field 10+ years' experience in complex SOCs Deep understanding of Subsystems, Memory Controllers, and memory architectures (e.g., SRAM, ROM, eFuse) Extensive experience with the Digital ASIC Flow, RTL design (Verilog), synthesis, timing closure, and debug methodologies (e.g., DFT, JTAG, Scan, BIST). Extensive knowledge of SOC architecture, setup/silicon bring-up, validation, and all associated More ❯

chip-level UVM environment and verify integration. Excellentdebugging and analytical skills. Proficiency in scripting languages and utilities including Makefile, Python, TCL/tsh, Perl etc. 10-15 years in ASIC design verification. Additional Preferred Qualifications Experience with HW emulation or FPGA prototyping Low power methodologies , e.g. UPF Experience in behavioural modelling of analogue circuits Experience in verifying processor based designs More ❯

Bicycle purchase scheme Employee run clubs, including, running, football, chess, badminton + many more Minimum Qualifications: • Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work More ❯

play a critical role in designing and building next-generation, commercial-grade LiDAR systems. The candidate must have a background in digital circuit specification, design and verification for ASIC/Mixed-Signal SoCs. We are looking for a person who is interested in working in a start-up style environment where responsibilities can be varied and where there are More ❯

Raspberry Pi is seeking an experienced Digital IC Design Engineer to join our innovative ASIC team. The role is based on site in Cambridge with an expectation that the successful candidate comes into the office on a full time basis. The work of the whole ASIC team includes: Architecture, considering software/hardware trade-offs RTL design IP selection and … Verilog/SystemVerilog for design and verification Familiarity with scripting languages (Bash, Python, Tcl, etc) The following would also be useful: Experience of Cadence simulation tool flow Experience with ASIC/FPGA synthesis and implementation, embedded systems, DFT architecture and insertion, software development, scripting More ❯

A skilled communicator and collaborator, you thrive in a fast-paced, innovative environment. Required Skills: Expertise in digital IC design and RTL at IP or SoC level. Proficiency in ASIC/FPGA design tools and optimisation techniques. Strong analytical and problem-solving abilities. Preferred Skills: Experience with verification methodologies (UVM, assertions, formal verification). Knowledge of CPU/GPU/ More ❯

Work closely with the exec team to translate product requirements into hardware team deliverables Support discussions with customers during presales and product development Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of UVM based testbenches Lead AccelerComm's engineering methodology, processes and design techniques Nurture professional growth of team members through regular mentoring, coaching … and feedback Skills, Knowledge & Expertise Essential Skills and Experience: Track record of building and leading high performing collaborative teams Expert knowledge of an RTL design (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivery of digital designs for ASIC and FPGA Optimisation of timing and hardware resources for high throughput data or signal processing applications. Experience More ❯

and incorporate them into team's workflows. Education: BS in Electronic Engineering/Computer Science Experience: 8+ years work experience Must have at least 3 years of experience in ASIC design, integration, or verification. Must have expertise in some of the following domains: processor design, on-chip communication and interconnects, high-speed interfaces, or chiplets. Expertise in Verilog/System … Verilog for coding and verification. Proficiency in RTL design techniques, including synthesis, timing closure, and verification. Experience in using UVM for functional verification of ASIC designs. Experience with EDA tools like Cadence and Synopsys for design simulation and verification. Extensive experience with FPGA emulation, design tools, and verification. Contact: For further information please contact Mícheál at Software Placements on More ❯

Python programming Git Data Structures/Algorithms Object Oriented Design Debugging techniques Linux Excellent teamwork and interpersonal skills; ability to work as part of a multi-disciplinary team (HW, ASIC/FPGA, SW and Mechanical design engineers) Analytical approach to Problem Solving ATE knowledge and familiarity are an added plus but not a core job requirement. Familiarity with the Agile More ❯

Integration, Sales & Marketing Provide broad technical expertise and mentor junior engineers within the team Minimum Qualifications: • Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work … experience. OR PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. REQUIRED EXPERIENCE: Engineering degree in a relevant discipline. BSc, MSc or equivalent 10 to 15 years' experience of relevant IC development Fluent English speaker Recent successful RFIC/analogue project contributions on highly integrated RF transceivers, ideally More ❯

Integration, Sales & Marketing Provide broad technical expertise and mentor junior engineers within the team Minimum Qualifications: • Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work … experience. OR PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. REQUIRED EXPERIENCE: Engineering degree in a relevant discipline. BSc, MSc or equivalent 10 to 15 years' experience of relevant IC development Fluent English speaker Recent successful RFIC/analogue project contributions on highly integrated RF transceivers, ideally More ❯

and finds solutions that are documented and shared with internal cross functional teams working on similar products. The Engineer will be responsible for automation for development and validation of ASIC products generating Python test scripts, writing embedded C code for FW radio control, supporting the business group with radio training materials and investigating customer issues and product returns where required. More ❯

Location: Swindon Hybrid working available A well-established and innovative design centre is looking for a Senior/Principal Mixed-Signal Design Engineer to lead the development of complex ASIC solutions. This multidisciplinary R&D team works across integrated circuits and MEMS technologies for a wide range of applications, from concept through to qualified silicon. Key Responsibilities Lead the … specification, design, and verification of mixed-signal IC blocks. Drive architectural development and system-level modelling of analog and digital functions. Act as technical lead on ASIC development projects, working closely with customers to refine requirements and deliver tailored solutions. Guide and mentor junior engineers while contributing to the continuous improvement of internal design processes. Collaborate with suppliers to select … skills (Python, MATLAB) and comfortable working in Linux-based design environments. Excellent communication and leadership skills, with the ability to work cross-functionally. What's Offered Lead technically challenging ASIC projects from architecture to tape-out. Join a collaborative and well-resourced engineering team. Competitive compensation package including pension, bonus, and private medical insurance. Flexible work arrangements, personal development support More ❯

system commissioning Support manufacturing and test teams during build and validation phases Essential Skills & Experience: Digital Circuit Design: Expertise in logic gates, flip-flops, and state machines FPGA & ASIC Development: Experience in designing and implementing FPGAs and ASICs HDL Proficiency: Strong knowledge of VHDL and/or Verilog Embedded Systems: Familiarity with microprocessor and microcontroller architectures Mixed-Signal Design More ❯

Electronic Engineering/Computer Science with 8+ years work experience, or MS in EE/CS with 4+ years' experience. Must have at least 3 years of experience in ASIC design, integration, or verification. Must have expertise in some of the following domains: processor design, on-chip communication and interconnects, high-speed interfaces, or chiplets. Expertise in Verilog/System … Verilog for coding and verification. Proficiency in RTL design techniques, including synthesis, timing closure, and verification. Experience in using UVM for functional verification of ASIC designs. Experience with EDA tools like Cadence and Synopsys for design simulation and verification. Experience with FPGA emulation, design tools, and verification desirable Additional Information: Cadence is committed to equal employment opportunity and employment equity More ❯

design. Solid understanding of digital design principles, including pipelining, clock domain crossing, and low-power design techniques, high performance design techs. Proficient in Verilog/SystemVerilog/VHDL.Familiar with ASIC design flow and tools (e.g., lint, synthesis, simulation). Strong debugging and problem-solving skills. Desired Requirements: Experience with GPU design or computer graphics architecture. Familiarity with high-speed interfaces More ❯

industry roles Proven leadership and planning skills Motivated, self-starting, and collaborative Ability to troubleshoot complex issues across teams and languages Experience with verification in CPU and/or ASIC environments Knowledge of SystemVerilog, Python, C++, Linux, UVM, SVA, Assembly, LLVM, GCC, Git, SGE or other DRS Familiarity with XML, XPath/XSLT We offer a competitive salary, flexible working More ❯