26 to 50 of 54 Electronic Design Automation Jobs in the UK excluding London

craft Arm's next generation of hardware platforms and SoC solutions? We seek Electronics Engineers with experience of high-speed, embedded hardware and PCB design to join Arm’s Hardware Platform team, based in Cambridge. The team is working at the forefront of embedded design focusing … board design perspective Extensive knowledge of PCB stack-up definition, controlled impedance routing guidelines for complex stack-ups and topologies Strong competence in EDA tools for schematic entry, driving PCB layout from a board-design perspective (Cadence OrCAD CIS, Allegro PCB suite) Embedded hardware debug using laboratory test ...

fantastic opportunity has arisen for a Staff Digital IC Design Engineer to join an established Technology company in Cambridge, working on the development of digital functions for mixed-signal products. This role will take responsibility for digital IC design throughout the development lifecycle, from product definition and architecture … design methodologies. Strong experience delivering fully synthesised digital designs through RTL and logic synthesis flows. Experience working with SystemVerilog and industry-standard digital EDA tools. Familiarity with design constraints and automated place-and-route flows. A strong understanding of production test requirements and digital test methodologies. Experience with ...

excellent opportunity for a STA Engineer to work within a highly collaborative team, contributing across the full chip development lifecycle from early design stages through to silicon delivery and product release. The team is relatively small, giving engineers broad exposure and the opportunity to have a genuine impact … ASIC implementation Deep understanding of timing closure methodologies and sign-off flows for advanced ASIC and SoC designs Strong knowledge of industry-standard EDA tools such as Synopsys PrimeTime, Design Compiler and place-and-route tools Experience working on complex, high-performance semiconductor products, ideally within ...

excellent opportunity for a STA Engineer to work within a highly collaborative team, contributing across the full chip development lifecycle from early design stages through to silicon delivery and product release. The team is relatively small, giving engineers broad exposure and the opportunity to have a genuine impact … ASIC implementation. Deep understanding of timing closure methodologies and sign-off flows for advanced ASIC and SoC designs. Strong knowledge of industry-standard EDA tools such as Synopsys PrimeTime, Design Compiler and place-and-route tools. Experience working on complex, high-performance semiconductor products, ideally within ...

complex multi-die SoCs. Working at the forefront of semiconductor innovation, you will collaborate with product teams, system architects, design engineers and EDA vendors to shape DFT technologies several years ahead of production. This is a highly technical architecture role with significant influence across Arm and the broader semiconductor … investigations to solve future product challenges. Collaborate with architecture, implementation, verification and physical design teams to define robust DFT solutions. Work closely with EDA vendors to influence product roadmaps, evaluate new capabilities and drive adoption of new technologies. Produce architecture specifications, methodology documentation and deployment guidance. Provide technical leadership ...

experienced, skilled, and motivated engineering team is heavily involved in shaping the future of AI. A successful candidate will exhibit exceptional knowledge in Design for Testability (DFT) and will have a strong technical background and experience in DFT methodologies, complemented by a robust, self-motivated work ethic. The ideal … based testing and industry standard ATPG tools Knowledge of ATPG pattern verification and gate-level simulation flows using Synopsys VCS and Verdi or other EDA tools Very good knowledge of Digital Integrated Circuits and Systems Hands-on experience with Verilog RTL coding and familiarity with System Verilog Strong scripting ...

Chips (SoC’s) to help shape our future products.The role shall be based in either Southampton or Bristol with a primary focus on the design and development of embedded VHDL firmware for complex aircraft sensor and communication systems.You will be part of the Leonardo Airborne Communications product development group … mitigating technical risk for Firmware design activities.* Ability to communicate effectively across different disciplines both verbally and in written form.* Familiarity with Siemens EDA FPGA development tools including HDL Designer and ModelSim/Questa is an advantage.**It would be nice if you had:*** Awareness of Safety, Security ...

engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary We are looking for high-quality silicon physical design engineers to complement our existing exceptional team. We have a range of roles available with focus on those with extensive ranges of skills … leading-edge process technologies while meeting ambitious development schedules. Contributions are expected to span multiple areas and involve: using state-of-the-art EDA tools and in-house Graphcore flows to deliver final designs that are of sign-off quality enhancing existing flows and in-house tools/APIs ...

project activities of each Tech Lead, through regular catch ups and/or reviewing the reporting materials that they generate to their project design authority. Periodically review each Tech Lead’s L4 project plans. With knowledge of each Tech Lead’s project activities and plans, provide pro-active guidance … actual gate review takes place. To be an escalation route to support realistic cost effective technical delivery solutions (Stakeholders include Head of Actuators, Equipment EDA, Head of Equipment Delivery). Tailor the level of support and involvement as appropriate, based on the needs of each individual team Tech Lead. Investigate ...

Principal Design Team Leader Department: Hardware Employment Type: Permanent Location: Southampton, UK Description As the Principal Design Team Leader at AccelerComm, you will be working on 5G base stations on board satellites. This revolutionary technology is at the leading edge of non-terrestrial communications, and will underpin … timing and hardware resources for high throughput data or signal processing applications. Experience in power management techniques, synthesis and timing analysis Expert user of EDA tools for simulation and synthesis Knowledge and appreciation of project management methodologies across the design lifecycle including agile and waterfall, requirements capture and traceability. ...

System-on-Chips (SoC’s) to help shape our future products. The role shall be based in Basildon with a primary focus on the design and development of embedded VHDL firmware for complex airborne electro-optics subsystems. You will be part of the Leonardo Sensors product development group within … technical decisions and mitigating technical risk forFirmware designactivities. Ability to communicate effectively across different disciplines both verbally and in written form. Familiarity with Siemens EDA FPGA development tools including HDL Designer and ModelSim/Questa is an advantage. It would be nice if you had: Awareness of Safety, Security ...

About the Role The Perforce IP Lifecycle Management (IPLM) suite - used by semiconductor and hardware design teams to manage their intellectual property (IP), releases, and dependencies at scale - includes a Python command-line client (pi), the IPLM API server, the PiCache caching layer, and a Web based interface. … Have Prior experience building or maintaining a Python CLI used by other engineers as part of their daily workflow. Exposure to IP lifecycle management, EDA tooling, or the semiconductor/hardware design domain. Experience with basic development on Microsoft Windows; building and packaging Windows applications. Hands ...

will have proven experience in delivering industry‐leading verification quality and productivity under tight schedules. In this role the candidate will collaborate with architecture, design and central formal verification teams to define our formal verification roadmap, strategy, methodology, infrastructure and expand formal verification adoption through project execution. The candidate … engines and use cases Proven expertise in system Verilog assertion and abstract model development Expert user of formal verification tools from both academia and EDA vendors (JasperGold, VC formal, Murphi, theorem prover) Proven track record of delivering high quality verification under tight schedule for modern, large‐scale processor design ...

Overview: We are looking for an EDA Optimisation Engineer to support the data-driven optimisation, analysis and maintenance of Arm’s engineering platforms. This role will work as part of a team effort to improve system utilisation/efficiency/cost-performance and touch on forecasting accuracy and infrastructure strategy. … finance teams to ensure data-driven decision making. Required Skills and Experience : Background in distributed HPC, cloud environments, data engineering & analytics. Knowledge of EDA workflows and semiconductor engineering environments. Proficiency in Python and data analysis/ML frameworks. Ability to turn sophisticated data into clear, actionable strategy. “Nice To Have ...

Senior FPGA/ASIC Design Engineers - 5G & Satellite Technology Spectrum IT Recruitment is working with a cutting-edge technology business in Southampton that is expanding its engineering team and looking for multiple Senior Design Engineers with strong FPGA/ASIC experience. This is an opportunity to work … synthesis and timing analysis Knowledge of high-throughput data or signal-processing designs Experience optimising timing and hardware resources Strong knowledge of industry-standard EDA simulation and synthesis tools Experience delivering complex, integrated digital designs Additional experience with 5G, communications/DSP algorithms, UVM, AMBA, SystemC/C++, PCIe, JESD ...

next-generation compute architectures, developing high-performance, power-efficient CPU technology on the most advanced process nodes, is looking for an experienced Physical Design Engineer to join its growing team. You will play a key role in the implementation of cutting-edge CPU IP within a world-class engineering …/SoC designs Experience across the full implementation flow including floorplanning, place and route, CTS and physical sign-off Familiarity with industry-standard EDA tools such as Innovus, ICC2, Fusion Compiler or equivalent Good understanding of timing closure, power optimisation and physical verification methodologies Strong scripting skills with TCL, Python ...

understanding through to tape-out. Define system architecture, instruction set architecture (ISA) and dataflow models based on workload requirements. Perform HW/SW co-design activities, including arithmetic implementation and analysis of programmability and host requirements. Build functional simulations and performance models to guide architectural decisions. Conduct timing, power … architectural trade-off analysis using Python, C++ or similar languages. Experience with industry-standard semiconductor tool flows such as Synopsys, Cadence or Siemens EDA tools. Solid understanding of timing, power and area optimisation at the architectural level. Experience defining hardware/software interfaces and collaborating with firmware and compiler teams. ...

across global sites. In this role, your will oversee the platforms and services that are essential to chip development, including high-performance compute environments, EDA tool infrastructure, job scheduling systems, revision control platforms, enterprise storage, automation, and engineering productivity tooling. The ideal candidate combines deep technical expertise with strong … observabilityDrive operational excellence across 24x7 production environments, including incident response, root cause analysis, change management, and disaster recovery planningPartner with silicon engineering, CAD/EDA teams, IT, security, program management, and executive leadership to align infrastructure priorities with business and product development goalsImprove engineering productivity by advancing automation, self ...

wants to join a verification team using leading-edge tools and methodologies? Do you want to be part of the growth of our Design Center in Bristol? Are you fascinated by the future of mobility and want to play a key role at the #1 semiconductor partner … delivering to metric targets Capability to understand complex Design specifications , derive features, and test bench architectures from concept Capability to use industry-standard EDA tools Good time management skills and the ability to deliver high-quality requirements under pressure Aptitude for clear communication of issues and progress A safety ...

Expertise in hardware verification languages, particularly System Verilog and UVM, with the ability to design efficient and effective test bench architectures Familiarity with EDA tools for Design and Simulation, as well as scripting languages such as Python or Perl Knowledge of functional safety standards, including ISO26262 and ASIL ...

live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological … Together, you’ll collaborate with Sales, R&D, and global engineering teams to drive customer success, influence product direction, and support Synopsys’ leadership in EDA innovation. Your team values diversity, open communication, and continuous professional growth, fostering an inclusive and supportive work environment. Rewards and Benefits: We offer a comprehensive ...

learning, building next‐generation tools to transform how complex integrated circuits are verified. Their technology accelerates simulation coverage and reduces tapeout risk - giving chip design teams a step‐change in capability. This is a high‐impact opportunity for a Machine Learning Engineer looking to make a difference in silicon. … system ownership from data ingestion to model deployment Clear communication - writing specs, documenting APIs, presenting to customers Familiarity with circuit simulation or EDA tools (nice to have) C++/CUDA experience for performance‐critical components (nice to have) Startup or fast‐moving team experience Why consider it: Competitive salary, bonus ...

quality and bring down costs, then this is the role for you. You’ll work closely with colleagues across modelling, system architecture, and RTL design to ensure our RTL releases meet the highest standards of functional quality. That includes contributing to discussions around specification, architecture, and the workflows that … Assertions (SVA) Software fluency in multiple languages Open source tools for silicon development Cocotb (used for all our testbench collateral), Verilator, Icarus Verilog Commercial EDA tools Formal verification Bazel is our chosen tool, familiarity is not expected Contributing to architecture discussions How we work Ownership and execution: you will have ...

Limited in Cambridge is seeking an EDA Optimisation Engineer to drive data-driven optimisation, analysis and maintenance of Arm’s engineering platforms. You will help improve system utilisation, efficiency and cost-performance across HPC compute, cloud, Emulation and FPGA environments. In a metrics-first environment, you will develop dashboards, pipelines ...

quality and bring down costs, then this is the role for you. You’ll work closely with colleagues across modelling, system architecture, and RTL design to ensure our RTL releases meet the highest standards of functional quality. That includes contributing to discussions around specification, architecture, and the workflows that … Assertions (SVA) Software fluency in multiple languages Open source tools for silicon development Cocotb (used for all our testbench collateral), Verilator, Icarus Verilog Commercial EDA tools Formal verification Bazel is our chosen tool, familiarity is not expected Contributing to architecture discussions #J-18808-Ljbffr ...