Senior Physical Design (ASIC) Engineer Engineering · Cambridge ·
- Hiring Organisation
- Jobleads-UK
- Location
- United Kingdom
Clock tree synthesis (CTS) Parasitic extraction Static timing analysis (STA) and timing closure Proven experience using industry-standard Electronic Design Automation (EDA) tools (e.g., Cadence, Synopsys, Siemens EDA) Ability to apply advanced engineering principles to solve complex technical problems Strong written and verbal communication skills Ability to work independently ...