51 to 64 of 64 Remote UVM Jobs

the Algorithm team to understand requirements and translate them into architectures for RTL implementations. Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of UVM based testbenches. Actively engage with and adhere to engineering methodology, processes and design techniques, being able to offer improvements to efficiency and quality for both the design flow and the … timing and hardware resources for high throughput data or signal processing applications. Experience in power management techniques, synthesis and timing analysis Familiar with the AMBA bus protocol Understanding of UVM verification techniques or practical experience using UVM for IP verification. This is a Hybrid working role and you must be able to work onsite 2-3 days per week. For More ❯

timely updates on verification status. Qualifications • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field. • Strong expertise in verification methodologies, such as UVM, and experience with PCIe, ethernet, and other relevant protocols. • Excellent leadership and communication skills with a track record of successfully leading verification teams. • Ability to thrive in a dynamic, fast More ❯

and SoC design. We are looking for engineers with proven experience in several of the following areas: •Computer architectures (ARM or RISC-V) •FPGA Development •VHDL/Verilog •SystemVerilog •UVM Verification •Interconnect protocols such as AXI or OCP Requirements: •Be part of innovative, high-impact projects in a fast-moving industry •Collaborate with a global team of expert engineers •Enjoy More ❯

professional experience in programming embedded software for the avionics/aerospace industry to include C or Ada programming along with any level of project management or lead experience in UVM, Cost analysis, MS Projects or other PM software . This position is covered under Dept of Defense regulations, and candidates are required to be U.S. Citizens. Pay Range: Up to … professional experience in programming embedded software with a background in software lifecycle, verification, and validation, preferably within the aerospace industry. Any level of project management or lead experience in UVM, Cost analysis, MS Projects or other PM software . Professional experience with C programming language. ADA programming is helpful, though not a required prerequisite. This position is covered under Dept More ❯

based system designs and verification methodologies. The ideal candidate will be experienced in verifying complex SoC architectures, utilizing languages such as C, System Verilog (SV), and Universal Verification Methodology (UVM). This role involves close collaboration with design teams to ensure that all aspects of the SoC are thoroughly validated, from architectural design to implementation. The candidate will also contribute More ❯

packages and driving them to success. Required Skills and Experience: Meticulous attention to detail, ensuring high-quality verification that minimizes bug escapes. Shown experience in block-level verification using UVM or similar methodologies. Strong knowledge of coverage driven verification for complex designs. Proficient in specifying, creating, and debugging SystemVerilog/UVM constrained-random testbenches. Skilled in planning verification tasks and More ❯

packages and driving them to success. Required Skills and Experience : Meticulous attention to detail, ensuring high-quality verification that minimizes bug escapes. Shown experience in block-level verification using UVM or similar methodologies. Strong knowledge of coverage driven verification for complex designs. Proficient in specifying, creating, and debugging SystemVerilog/UVM constrained-random testbenches. Skilled in planning verification tasks and More ❯

Job Overview This position is an excellent opportunity for an experienced and highly motivated verification engineer to join the Arm Systems Media IP team! The team is responsible for the development of Image Signal Processors (ISPs), Display Processors, and Video More ❯

Work closely with the exec team to translate product requirements into hardware team deliverables. Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of UVM based testbenches. Lead engineering methodology, processes and design techniques. Nurture professional growth of team members through regular mentoring, coaching, and feedback Skills, Knowledge & Expertise: Track record of building and leading … for ASIC and FPGA. Optimisation of timing and hardware resources for high throughput data or signal processing applications. Experience in power management techniques, synthesis and timing analysis. Understanding of UVM verification techniques or practical experience using UVM for IP verification. This is a Hybrid working role and you must be able to work onsite 2-3 days per week. For More ❯

Engineering, or Computer Science. Solid understanding of emulation methodologies and flows. Experience with emulation platforms such as ZeBu, Palladium, or Strato. Familiarity with RTL languages (SystemVerilog/Verilog) and UVM-based verification environments. Hands-on experience in compiling and debugging large-scale designs on emulation platforms. Proficiency in scripting (Python, Perl, or similar) to automate workflows and diagnostics. Excellent problem More ❯

Job Overview This position is an excellent opportunity for an experienced and highly motivated Verification Engineer to join the hardworking System IP team! This is a fast-paced technical role employing the latest hardware design and verification methodologies to develop More ❯

get in touch. 1. Verification Lead (Permanent) Location: Hertfordshire, UK (Hybrid/Onsite Flexible) Leadership role managing SoC/IP-level verification Requirements: 6+ years experience, strong SystemVerilog/UVM, team mentorship 2. Hardware Verification Engineer (Permanent/Contract) Location: Hemel Hempstead, UK (Hybrid Preferred | Remote Considered) Type: Contract (Outside IR35) Focus: RISC-V, GPU, AI, complex SoCs Requirements: 5+ … years experience, SystemVerilog/UVM, scripting 3. Junior/Mid-Level Verification Engineer (Permanent) Location: Hertfordshire, UK (Hybrid/Onsite Flexible) Perfect for engineers early in their verification careers Requirements: 1+ year experience, familiarity with SystemVerilog/UVM If any of these sound like a fit, please feel free to reach out or send your CV. If these roles are More ❯

IP. The role offers a chance to contribute to industry-leading ASIC and SoC solutions in a dynamic, fast-paced environment. Key Skills & Experience Sought: Digital verification with SystemVerilog, UVM, or cocotb Computer architecture knowledge (ARM or RISC-V) Formal verification techniques Interconnect protocols: AXI or OCP ASIC design tool flows Exposure to OpenGL or Vulkan APIs is a plus More ❯

to production and delivery/tape-out, including performance review, analysis, costing, and optimisation Understanding of the product's design & verification needs, standardisation, adherence to frameworks and methodolgies e.g. UVM Excellent communicator, with a keen interest in team collaboration and a clear approach to the design & development process Bonus/"Nice-to-have" skills Digital Video processing/video compression More ❯