51 to 75 of 174 Verilog Jobs

techniques Providing technical support for customer engagements Requirements: Masters degree in Engineering, Mathematics or other Scientific DisciplineAt least 5 years' experience generating clear, well-documented, and well-tested SystemVerilog, Verilog or VHDL code Experience simulating and verifying large RTL designsWorked with FPGA EDA tools such as Quartus or Vivado Worked with software languages such as C, C++, Python Familiarity with More ❯

colleagues across the whole design flow: micro-architecture, design, verification, physical implementation and optimisation for ASIC and FPGA Skills, Knowledge and Expertise Essential: Expert knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivering digital designs in the ASIC and FPGA industry Optimisation of timing and hardware resources for high throughput data More ❯

Engineering (CE), Electrical Engineering (EE), Computer Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working with digital simulators and More ❯

Engineering (CE), Electrical Engineering (EE), Computer Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working with digital simulators and More ❯

or Education: High-rate Communication Systems, Satellite Communication Systems, Spread Spectrum Systems, LPD/AJ Systems, Non-linear signal processing, MIMO, Phased Array Processing. Proficiency in VHDL (preferred) or Verilog development languages. Experience in implementing complex modem and/or DSP circuits in SW or programmable logic using FPGA devices. ASIC design experience is also relevant. Familiarity with simulation, synthesis More ❯

with real-time testing and performance evaluation of RF systems. Desirable Skills Experience with GnuRadio or similar SDR platforms. FPGA/RFSOC development experience and proficiency in VHDL or Verilog Familiarity with Linux environments, version control systems (e.g., GitLab), and collaborative development tools. Experience with payload development for defence or covert communications systems. Salary and Benefits Salary circa More ❯

technology, embedded systems, or software-defined radio. You'll have significant experience in some or all of the following areas: FPGA design, including experience in languages such as VHDL, Verilog, and High-Level Synthesis Modelling tools such as MATLAB and Simulink Radio communications and Digital Signal Processing (DSP) techniques Software Defined Radio (SDR) and RF techniques Software Development Development of More ❯

cases and regression suites to improve verification efficiency and coverage. Required Skills and Experience : Solid understanding of SoC Verification (using C Testcases), hardware description and verification languages e.g. SystemVerilog, Verilog, VHDL. Understanding of Computer architecture, bus protocols (e.g., AXI, AHB), and peripherals. Experience with Tcl, Python or other scripting languages. "Nice To Have" Skills and Experience : Experience with ARM-based More ❯

Bachelor's degree in a technical area (BSEE or other Engineering discipline preferred) with 5 years of relevant experience (3 years with technical MS) - Experience in HDL (VHDL/Verilog) and HVL (SystemVerilog) OR Bachelor's degree in a technical area (BSEE or other Engineering discipline preferred) with 9 years of relevant experience (7 years with technical MS; 4 years … with PhD) - Experience in HDL (VHDL/Verilog) and HVL (SystemVerilog) Required Skills: Experience in HDL (VHDL/Verilog) and HVL (SystemVerilog) Experience with SystemVerilog Assertions (SVA) Knowledge of Universal Verification Methodology (UVM) Familiarity with a coverage driven verification methodology from planning through closure Knowledge of industry standard interfaces Experience with object oriented programming languages and concepts Desired Skills: Advanced More ❯

programmable gate arrays (FPGAs), hardware description languages, and associated simulation tools. Key Responsibilities: Design, implement, and test digital hardware solutions using FPGAs. Develop and simulate HDL code (VHDL or Verilog) using ModelSim or equivalent tools. Utilize Xilinx design tools (e.g., Vivado, ISE) for synthesis, implementation, and debugging. Collaborate with cross-functional teams to integrate hardware and software components. Perform verification … and validation of hardware designs. Requirements Top Secret SCI w/Polygraph Clearance Required Required Qualifications: Proven experience in FPGA development. Proficiency in VHDL and/or Verilog HDL. Strong experience using ModelSim and Xilinx development tools. Solid understanding of digital logic design principles. Preferred (Nice to Have): Familiarity with software development languages including Java, C, C++, or Ruby on More ❯

role DV Engineer, Senior : Design Verification of custom V&M and IoT IP and SoCs, including: Design analysis for testability Test planning Test bench and infrastructure development using System Verilog and UVM IP level test development using System Verilog and UVM IP level test development using Formal Methods SoC level test development using System Verilog and embedded C code Work … is in a dynamic team environment. Skills and Experience we would love to see Experience of System Verilog, Verilog Experience of UVM Experience of C or other high-level languages SV-UVC development UVM testcase development Strong debug skills Knowledge of Standard interfaces, Bus protocols and Processor architectures Proven track-record of delivering quality verification on time Enthusiasm to learn … Science, Masters - Electrical Engineering Work Experiences: 3 yrs+ in an appropriate Design Verification role, with hands-on experience of designing and coding UVM UVCs and test cases. Skills: System Verilog, UVM, Embedded C, Design Verification, Python WE INVENT THE TECH THE WORLD LOVES, SO IF YOU ARE INTERESTED IN LEARNING MORE What's on Offer Apart from working in an More ❯

Job Description: Additional Responsibilities: • Develop chip-level and block-level integrated circuit requirements based on customer needs. • Design and simulate circuits using functional modeling tools (e.g. MATLAB, Simulink, System Verilog) • Lead multidisciplinary design teams, providing clear and effective communication to the team and project manager. • Participate in technical project planning and provide technical inputs to business development activities. Preferred Qualifications … Proficiency with Cadence Virtuoso or equivalent mixed signal integrated circuit design tools • Expertise in high level mixed-signal modeling & verification tools such as System Verilog, SV-RNM, Verilog-AMS • Proficient in scripting (e.g. Python, SKILL) for automating aspects of the design, implementation, verification, and test flows. • Experience in top level design for previous tape outs More ❯

focus on performance, low power, and scalability. You will work closely with cross-functional teams including RF, firmware, verification, and architecture. Key Responsibilities Design and implement digital logic in Verilog/SystemVerilog for Wi-Fi MAC/PHY and related IP blocks Collaborate on micro-architecture definition and specifications Drive RTL design from concept through synthesis and verification to GDSII … required Requirements Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field 5+ years of hands-on ASIC design experience Strong RTL design skills using Verilog or SystemVerilog Experience in SoC development and integration Familiarity with Wi-Fi, wireless MAC/PHY, or DSP-based systems is a plus Good scripting skills (Python, Perl, or TCL More ❯

of static & formal verification tools inc. property checking using SVA or PSL Expertise in clock/reset and low power design & verification techniques. Experience of RTL coding (VHDL/Verilog/System Verilog). Experience with Linux and Windows environments including scripting languages. Excellent presentation and communication skills in English (knowledge of other European languages would be an advantage). More ❯

add multiple engineers to their growing R&D team. We have FPGA/Firmware Engineering roles available! Core skills we’re looking for: FPGA design – ideally with SystemVerilog/Verilog experience Strong programming capabilities using C, C++, Python or Rust Exposure to Linux operating systems Any exposure to Ai, Machine Learning or related tech is beneficial but not essential. If More ❯

the nature of the role the company requires you to be onsite most of the time. FPGAEngineer Requirements : Degree qualified in Electronics Engineering or equivalent Background in FPGA Design Verilog VHDL Intel and Xilinx toolsets and devices (desirable) If you have the required skills for this FPGA Engineer position or would like to learn more then please get in touch More ❯

full design lifecycle, and join a team passionate about solving complex performance bottlenecks in real-world AI systems. Key skills required: Full FPGA design lifecycle experience RTL design in Verilog, SystemVerilog and/or VHDL Proficiency in C, C++ or Python for hardware-software integration Familiarity with Quartus, Vivado or similar toolchains Experience optimising RTL for performance and resource usage More ❯

other program personnel, government overseers, and senior executives. Experienced hardware engineer. Knowledge of field-programmable gate arrays (FPGAs). Knowledge of ModelSim, for VHSIC hardware description language (VHDL) or Verilog HDL coding and simulations, and Xilinx tools. Nice to have, but not required: Software languages (Java, C, C++, Ruby on Rails) and operation systems (Unix, Linux, Windows). Qualifications: Twenty More ❯

Electronics, Physics, or related field (Master's or PhD preferred). Proven experience in analog and digital IC design, including physical design considerations and verification. Proficient in VHDL/Verilog and system-level modelling. Strong scripting skills (Python, MATLAB) and comfortable working in Linux-based design environments. Excellent communication and leadership skills, with the ability to work cross-functionally. What More ❯

or Masters degree from a top-tier university in Engineering, Computer Science, Maths, or related field Must have 3+ years' experience in RTL design and verification for FPGAs using Verilog, SystemVerilog or VHDL Experience in FPGA toolchains using Xilinx Vivado or Intel Quartus Experience of using Python within verification frameworks Experience of simulation environments, Modelsim/Questa preferred Knowledge of More ❯

highly motivated engineer with at least four years of experience in digital IC design You have experience with front-end ASIC or FPGA design in VHDL and/or Verilog and/or SystemVerilog You have experience with front-end verification, preferably in SystemVerilog + UVM, to write directed tests, constrained randomized tests and to gather and interpret metrics such More ❯

with Linux kernel driver development/modifications • Familiarity with assembly language • Familiarity with to bare metal embedded device drivers • Familiarity with PowerPC architectures and peripherals • Familiarity with VHDL/Verilog/FPGA • Familiarity with Xilinx tools (Vitis, Vivado) • Familiarity with IBM tools (Rhapsody, DOORS, Clearcase) • Familiarity with Green Hills AdaMulti • Familiarity with Static Analysis and Unit Testing • Current/active More ❯

designing systems that use DDR3/4 memory, PCIe, and Gbit serial interfaces • Basic experience with microcontroller software (using C/C or assembly), and FPGA firmware (VHDL or Verilog). Understanding of basic functionality and how the circuit designs interface with SW and FW. • Experience with the following design and simulation tools: Siemens Designer and Layout, Hyperlinx, Ansys, Spice More ❯

groups according to design requirements • Work on code and functional coverage closures to achieve 100% • Perform code reviews and to mentor junior engineers in the group • Fluent in System Verilog including SVA • Recent experience with UVM/UVMF • Familiarity with at least one major industry simulator (Questasim, Xcelium, VCS) • Familiarity with at least one IEEE bus standardExperience with DDR3/ More ❯

a strong technical foundation. Ideal candidates will have: Deep understanding of System on Chip (SoC) based design and build environment. A prerequisite of HDL coding and test benching (VHDL, Verilog). Software languages, C (or C++) is preferable, additional languages considered useful. Knowledge of one or more of Bash, TCL, or Python Should be confident understanding and capturing requirements in More ❯