discipline. • Experience of designing FPGA IP cores or sub-systems. • Designing FPGA architectures from a technical specification. • Design with AMD/Intel FPGA and CPLD devices. • Using VHDL/Verilog HDL languages for FPGA design. • Implementing high speed, multi-frequency clocking architectures. • Designing (code entry to timing analysis) using Intel and/or Xilinx FPGA tool sets. • Designing for high More ❯
discipline. • Experience of designing FPGA IP cores or sub-systems. • Designing FPGA architectures from a technical specification. • Design with AMD/Intel FPGA and CPLD devices. • Using VHDL/Verilog HDL languages for FPGA design. • Implementing high speed, multi-frequency clocking architectures. • Designing (code entry to timing analysis) using Intel and/or Xilinx FPGA tool sets. • Designing for high More ❯
discipline. • Experience of designing FPGA IP cores or sub-systems. • Designing FPGA architectures from a technical specification. • Design with AMD/Intel FPGA and CPLD devices. • Using VHDL/Verilog HDL languages for FPGA design. • Implementing high speed, multi-frequency clocking architectures. • Designing (code entry to timing analysis) using Intel and/or Xilinx FPGA tool sets. • Designing for high More ❯
have Experience of designing FPGA IP cores or sub-systems. Designing FPGA architectures from a technical specification. Design with AMD/Intel FPGA and CPLD devices. Using VHDL/Verilog HDL languages for FPGA design. Implementing high speed, multi-frequency clocking architectures. Designing (code entry to timing analysis) using Intel and/or Xilinx FPGA tool sets. Designing for high More ❯
have Experience of designing FPGA IP cores or sub-systems. Designing FPGA architectures from a technical specification. Design with AMD/Intel FPGA and CPLD devices. Using VHDL/Verilog HDL languages for FPGA design. Implementing high speed, multi-frequency clocking architectures. Designing (code entry to timing analysis) using Intel and/or Xilinx FPGA tool sets. Designing for high More ❯
have Experience of designing FPGA IP cores or sub-systems. Designing FPGA architectures from a technical specification. Design with AMD/Intel FPGA and CPLD devices. Using VHDL/Verilog HDL languages for FPGA design. Implementing high speed, multi-frequency clocking architectures. Designing (code entry to timing analysis) using Intel and/or Xilinx FPGA tool sets. Designing for high More ❯
have Experience of designing FPGA IP cores or sub-systems. Designing FPGA architectures from a technical specification. Design with AMD/Intel FPGA and CPLD devices. Using VHDL/Verilog HDL languages for FPGA design. Implementing high speed, multi-frequency clocking architectures. Designing (code entry to timing analysis) using Intel and/or Xilinx FPGA tool sets. Designing for high More ❯
experienced FPGA Engineer to undertake a long term contract. In order to be successful, you will have the following experience: Strong FPGA Engineering background, with skills in VHDL/Verilog Solid understanding of electronics and hardware systems, including interactions between software and hardware (e.g., RF over Ethernet) Experience working with AMD ZynqTM UltraScale+TM MPSoCs, ideally with functions partitioned between ARM More ❯
experienced FPGA Engineer to undertake a long term contract. In order to be successful, you will have the following experience: Strong FPGA Engineering background, with skills in VHDL/Verilog Solid understanding of electronics and hardware systems, including interactions between software and hardware (e.g., RF over Ethernet) Experience working with AMD ZynqTM UltraScale+TM MPSoCs, ideally with functions partitioned between ARM More ❯
Interfaces such as SPI, I2C, UART, GPIO, Raspberry Pi, Test automation scripting languages – Python, TCL to 10 years of experience Strong experience in CPLD/FPGA firmware development using Verilog/SystemVerilog Proficiency in scripting languages (e.g., Python, TCL) for automation and debug Hands-on experience with FPGA and Raspberry Pi integration Ability to create and maintain detailed technical documentation More ❯
experienced FPGA Engineer to undertake a long term contract. In order to be successful, you will have the following experience: Strong FPGA Engineering background, with skills in VHDL/Verilog Solid understanding of electronics and hardware systems, including interactions between software and hardware (e.g., RF over Ethernet) Experience working with AMD ZynqTM UltraScale+TM MPSoCs, ideally with functions partitioned between ARM More ❯
Interfaces such as SPI, I2C, UART, GPIO, Raspberry Pi, Test automation scripting languages - Python, TCL to 10 years of experience Strong experience in CPLD/FPGA firmware development using Verilog/SystemVerilog Proficiency in scripting languages (e.g., Python, TCL) for automation and debug Hands-on experience with FPGA and Raspberry Pi integration Ability to create and maintain detailed technical documentation More ❯
Interfaces such as SPI, I2C, UART, GPIO, Raspberry Pi, Test automation scripting languages – Python, TCL to 10 years of experience Strong experience in CPLD/FPGA firmware development using Verilog/SystemVerilog Proficiency in scripting languages (e.g., Python, TCL) for automation and debug Hands-on experience with FPGA and Raspberry Pi integration Ability to create and maintain detailed technical documentation More ❯
such as SPI, I2C, UART, GPIO, Raspberry Pi, Test automation Scripting languages - Python, TCL 1 to 10 years of experience Strong experience in CPLD/FPGA firmware development using Verilog/SystemVerilog Proficiency in Scripting languages (eg, Python, TCL) for automation and debug Hands-on experience with FPGA and Raspberry Pi integration Ability to create and maintain detailed technical documentation More ❯
work across teams and programming languages to find root causes of deep and complex issues Experience of the verification process applied in CPU and/or ASIC environments System Verilog, Python, C++, Linux UVM SVA LLVM, GCC SGE or other DRMS XML and XPath/XSLT Benefits In addition to a competitive salary, you can expect flexible working, a generous More ❯
Southampton, Hampshire, South East, United Kingdom Hybrid / WFH Options
Yoh Solutions Ltd
the forefront of next-generation satellite communications, with significant scope to influence both product direction and engineering methodology. What theyre looking for: Extensive experience developing complex digital designs in Verilog or SystemVerilog Strong track record delivering high-throughput FPGA or ASIC IP, ideally in signal processing or comms applications Expertise in simulation, synthesis, timing optimisation, and lab-based validation Proficiency More ❯
Southampton, Hampshire, England, United Kingdom Hybrid / WFH Options
Yoh, A Day & Zimmermann Company
forefront of next-generation satellite communications, with significant scope to influence both product direction and engineering methodology. What they’re looking for: Extensive experience developing complex digital designs in Verilog or SystemVerilog Strong track record delivering high-throughput FPGA or ASIC IP, ideally in signal processing or comms applications Expertise in simulation, synthesis, timing optimisation, and lab-based validation Proficiency More ❯
projects Required Experience Knowledge/Experience of developing/modelling/simulating software in at least one of the following areas: RF telecommunications, waveforms, OSI model, SIGINT, EW VHDL VERILOG Experience with SDR architecture Agile development methodologies. C#, C, C++, Python and Database architecture. Desirable Experience XML Networked systems JICD Restful and/or RPC API Library agnostic code development More ❯
Bachelor's degree in Science, Engineering, or related field. Experience 5+ years FPGA design, FPGA firmware or related work experience. 5+ years of direct hands-on experience with System Verilog, RTL/HDL, FPGA (Xilinx Ultrascale, Ultrascale+, MPSoC, Intel Stratix) and FPGA Tools (Xilinx, Intel) Excellent interpersonal and analytical skills with the ability to work independently, and create customer-facing … Experience Experience with clock domain crossing, high speed designs, and timing closure techniques Exposure to VLSI design concepts, logic design 8+ years of direct hands-on experience with System Verilog, RTL/HDL, FPGA (Xilinx Ultrascale, Ultrascale+, MPSoC, Intel Stratix) and FPGA Tools (Xilinx, Intel) Direct hands-on experience with C++ (x86, aarch64) and Python Experience with Linux/Embedded More ❯
get to work on a range of products throughout multiple industries, within cross-functional teams. Skills Required: + PCB Design Knowledge/Exposure + Knowledge of FPGAs, VHDL or Verilog + Experience with Software, Embedded C/C++ + Must be a graduate from a Russell Group University, achieving at least a 2:1 This role pays a competitive salary More ❯
Interfaces such as SPI, I2C, UART, GPIO, Raspberry Pi, Test automation scripting languages - Python, TCL to 10 years of experience Strong experience in CPLD/FPGA firmware development using Verilog/SystemVerilog Proficiency in scripting languages (e.g., Python, TCL) for automation and debug Hands-on experience with FPGA and Raspberry Pi integration Ability to create and maintain detailed technical documentation More ❯
Interfaces such as SPI, I2C, UART, GPIO, Raspberry Pi, Test automation scripting languages – Python, TCL to 10 years of experience Strong experience in CPLD/FPGA firmware development using Verilog/SystemVerilog Proficiency in scripting languages (e.g., Python, TCL) for automation and debug Hands-on experience with FPGA and Raspberry Pi integration Ability to create and maintain detailed technical documentation More ❯
or a related technical field. 8+ years of ASIC/VLSI design experience, focusing on synthesis and timing closure for large scale design in deep submicron technology. Expertise in Verilog/SystemVerilog RTL coding and constraint development for synthesis. Proficiency in synthesis tools from leading EDA vendors (Cadence, Synopsys, Mentor). Experience with gate-level simulation, static timing analysis (STA More ❯
quality work. Ability to work independently and manage time effectively. Ownership and responsibility for resolving issues promptly. Desirable Skills: Experience with Vivado, Libero, and Quartus tool chains. Knowledge of Verilog, System Verilog, and cryptographic algorithms. Familiarity with UVM/OSVVM or Assertion Based Verification for design validation. Understanding of Network Layer 2 and Layer 3 protocols, USB 3.2, and NVMe More ❯
