coverage etc. Qualifications: BS, MS in Electrical Engineering, Computer Engineering or Computer Science 8-20+ years and current hands-on experience in microarchitecture and RTL development Proficiency in Verilog, System Verilog Familiarity with industry-standard EDA tools and methodologies Experience with large high-speed, pipelined, stateful designs, and low power designs In-depth understanding of on-chip interconnects and More ❯
RTL developers to ensure design quality Required Education, Experience and Skills: Bachelor's degree in Electrical/Computer Engineering, 7+ years of FPGA verification experience Expert knowledge of System Verilog and UVM Demonstrated experience with formal verification tools and assertion-based verification Desired Skills: Experience with Cadence Jasper Gold or similar formal tools, Knowledge of security protocols and formal security … proofs, System Verilog Assertions (SVA) Background in mathematical logic and proof systems. More ❯
FPGA Engineer Location: Coventry Salary: £45,000-£50,000 We are excited to be supporting an established design consultancy who are looking to add an FPGA Engineer to their team. The role would offer the FPGA Engineer the opportunity to More ❯
FPGA Engineer Location: Coventry Salary: £45,000-£50,000 We are excited to be supporting an established design consultancy who are looking to add an FPGA Engineer to their team. The role would offer the FPGA Engineer the opportunity to More ❯
FPGA Engineer Location: Coventry Salary: £45,000-£50,000 We are excited to be supporting an established design consultancy who are looking to add an FPGA Engineer to their team. The role would offer the FPGA Engineer the opportunity to More ❯
Manchester, Lancashire, United Kingdom Hybrid / WFH Options
Arm Limited
automation and data analysis. "Nice To Have" Skills and Experience : Experience with SoC-level performance analysis and tools. Familiarity with memory subsystem micro-architecture and performance implications. Experience with Verilog/SystemVerilog RTL, including analysis and debugging in collaboration with design teams. Working knowledge of AMBA protocols and transaction-level modeling (SystemC/TLM). Exposure to Verilog/SystemVerilog More ❯
disciplinary team + Technical liaison, and maintenance and design specification of documentation Skills and Experience Required: + Deep understanding of FPGA fundamentals, fabric, and clocking resources + Proficiency in Verilog/System Verilog + Experience with RTL-level design + Previous telecommunications experience + Knowledge of 4G or 5G standards Bonus: + Experience with scripting languages (e.g. Python, Shell, Perl More ❯
Maidenhead, Royal Borough of Windsor and Maidenhead, Berkshire, United Kingdom
Platform Recruitment
disciplinary team + Technical liaison, and maintenance and design specification of documentation Skills and Experience Required: + Deep understanding of FPGA fundamentals, fabric, and clocking resources + Proficiency in Verilog/System Verilog + Experience with RTL-level design + Previous telecommunications experience + Knowledge of 4G or 5G standards Bonus: + Experience with scripting languages (e.g. Python, Shell, Perl More ❯
Company: QT Technologies Ireland Limited Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: About the role Qualcomm's Sensor IP Analog Mixed-Signal Design team is seeking an Analog/Mixed-Signal Sensor IP Design Engineer to join More ❯
Senior Digital Hardware Engineer required to apply their experience in a new and challenging environment, working across the full development life-cycle. Typical tasks include: Analysis of customer requirements. Create & modify electronic designs and architecture. Use simulation tools to generate More ❯
Senior Digital Hardware Engineer required to apply their experience in a new and challenging environment, working across the full development life-cycle. Typical tasks include: Analysis of customer requirements. Create & modify electronic designs and architecture. Use simulation tools to generate More ❯
