26 to 50 of 67 Electronic Design Automation Jobs in England

fantastic opportunity has arisen for a Staff Digital IC Design Engineer to join an established Technology company in Cambridge, working on the development of digital functions for mixed-signal products. This role will take responsibility for digital IC design throughout the development lifecycle, from product definition and architecture … design methodologies. Strong experience delivering fully synthesised digital designs through RTL and logic synthesis flows. Experience working with SystemVerilog and industry-standard digital EDA tools. Familiarity with design constraints and automated place-and-route flows. A strong understanding of production test requirements and digital test methodologies. Experience with ...

will work across the hardware stack to deliver high-performance, power-efficient compute silicon in a fast-paced environment. You will collaborate with PD, EDA, and software teams to translate performance targets into concrete RTL decisions, manage timing closure, and contribute to next-generation AI hardware architectures. #J-18808-Ljbffr ...

refactor support). Collaborate with Arm Engineering teams to capture real engineering struggles and turn them into clear requirements. Build quick prototypes and evaluate EDA AI tools, to validate feasibility and quantify impact. Drive adoption as a change leader: run demos/workshops; Contribute onboarding guides; Identify and remove adoption … verification methodology: Deep understanding of RTL design, interfaces between RTL, testbench and Verification IP, experience with debugging compile and simulation issues. Experience with EDA vendor tooling: Domain knowledge of at least one (of the three major) EDA vendor toolset. AI tooling fluency: Practical experience using AI for engineering automation ...

excellent opportunity for a STA Engineer to work within a highly collaborative team, contributing across the full chip development lifecycle from early design stages through to silicon delivery and product release. The team is relatively small, giving engineers broad exposure and the opportunity to have a genuine impact … ASIC implementation Deep understanding of timing closure methodologies and sign-off flows for advanced ASIC and SoC designs Strong knowledge of industry-standard EDA tools such as Synopsys PrimeTime, Design Compiler and place-and-route tools Experience working on complex, high-performance semiconductor products, ideally within ...

excellent opportunity for a STA Engineer to work within a highly collaborative team, contributing across the full chip development lifecycle from early design stages through to silicon delivery and product release. The team is relatively small, giving engineers broad exposure and the opportunity to have a genuine impact … ASIC implementation. Deep understanding of timing closure methodologies and sign-off flows for advanced ASIC and SoC designs. Strong knowledge of industry-standard EDA tools such as Synopsys PrimeTime, Design Compiler and place-and-route tools. Experience working on complex, high-performance semiconductor products, ideally within ...

complex multi-die SoCs. Working at the forefront of semiconductor innovation, you will collaborate with product teams, system architects, design engineers and EDA vendors to shape DFT technologies several years ahead of production. This is a highly technical architecture role with significant influence across Arm and the broader semiconductor … investigations to solve future product challenges. Collaborate with architecture, implementation, verification and physical design teams to define robust DFT solutions. Work closely with EDA vendors to influence product roadmaps, evaluate new capabilities and drive adoption of new technologies. Produce architecture specifications, methodology documentation and deployment guidance. Provide technical leadership ...

experienced, skilled, and motivated engineering team is heavily involved in shaping the future of AI. A successful candidate will exhibit exceptional knowledge in Design for Testability (DFT) and will have a strong technical background and experience in DFT methodologies, complemented by a robust, self-motivated work ethic. The ideal … based testing and industry standard ATPG tools Knowledge of ATPG pattern verification and gate-level simulation flows using Synopsys VCS and Verdi or other EDA tools Very good knowledge of Digital Integrated Circuits and Systems Hands-on experience with Verilog RTL coding and familiarity with System Verilog Strong scripting ...

Principal Design Team Leader Department: Hardware Employment Type: Permanent Location: Southampton, UK Description As the Principal Design Team Leader at AccelerComm, you will be working on 5G base stations on board satellites. This revolutionary technology is at the leading edge of non-terrestrial communications, and will underpin … timing and hardware resources for high throughput data or signal processing applications. Experience in power management techniques, synthesis and timing analysis Expert user of EDA tools for simulation and synthesis Knowledge and appreciation of project management methodologies across the design lifecycle including agile and waterfall, requirements capture and traceability. ...

craft Arm's next generation of hardware platforms and SoC solutions? We seek Electronics Engineers with experience of high-speed, embedded hardware and PCB design to join Arm’s Hardware Platform team, based in Cambridge. The team is working at the forefront of embedded design focusing … board design perspective Extensive knowledge of PCB stack-up definition, controlled impedance routing guidelines for complex stack-ups and topologies Strong competence in EDA tools for schematic entry, driving PCB layout from a board-design perspective (Cadence OrCAD CIS, Allegro PCB suite) Embedded hardware debug using laboratory test ...

craft Arm's next generation of hardware platforms and SoC solutions? We seek Electronics Engineers with experience of high-speed, embedded hardware and PCB design to join Arm's Hardware Platform team, based in Cambridge. The team is working at the forefront of embedded design focusing … board design perspective Extensive knowledge of PCB stack-up definition, controlled impedance routing guidelines for complex stack-ups and topologies Strong competence in EDA tools for schematic entry, driving PCB layout from a board-design perspective (Cadence OrCAD CIS, Allegro PCB suite) Embedded hardware debug using laboratory test ...

experienced Physical Design Engineer looking for your next challenge? Aion Silicon is actively building a pipeline of talented engineers for future opportunities, and we’d love to hear from skilled professionals who are passionate about Physical Design. With design centres across the UK, Spain, Hyderabad, and Morocco … reliability. Tapeout & Foundry Handoff GDSII/OASIS generation and validation. Foundry rule compliance (DRC/LVS deck handling). Tapeout data preparation and documentation. EDA tool knowledge Essential with either Synopsys (e.g., design compiler, ICC2, Fusion Compiler, ICV, Primetime, StarRC) and/or Cadence (Genus, Innovus, Tempus, Voltus ...

System-on-Chips (SoC's) to help shape our future products. The role shall be based in Basildon with a primary focus on the design and development of embedded VHDL firmware for complex airborne electro-optics subsystems. You will be part of the Leonardo Sensors product development group within … mitigating technical risk for Firmware design activities. Ability to communicate effectively across different disciplines both verbally and in written form. Familiarity with Siemens EDA FPGA development tools including HDL Designer and ModelSim/Questa is an advantage. It would be nice if you had: Awareness of Safety, Security ...

Senior DTCO DRAM Periphery Circuit Designer/ArchitectWhat you will doIn this position, you will join imec's memory design and pathfinding activities and take a leading role in the design and exploration of advanced DRAM periphery circuits. You will work on the circuits that enable full DRAM … chip activities. Internal imec job-description material explicitly frames these roles around enabling future semiconductor memory technologies and interacting with major foundry, fabless, and EDA partners in imec's ecosystem. You will have the opportunity to collaborate closely with circuit designers, device experts, process integration engineers, architects, and DTCO/ ...

engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary We are looking for high-quality silicon physical design engineers to complement our existing exceptional team. We have a range of roles available with focus on those with extensive ranges of skills … leading-edge process technologies while meeting ambitious development schedules. Contributions are expected to span multiple areas and involve: using state-of-the-art EDA tools and in-house Graphcore flows to deliver final designs that are of sign-off quality enhancing existing flows and in-house tools/APIs ...

Based in London, this is a unique opportunity for a Principal EDA Engineer to join a well-funded deep-tech company building next-generation quantum computing hardware and software. This role offers hybrid working, and the chance to work on breakthrough computing technology that has the potential to redefine … entire industry. As the Principal EDA Engineer you will be developing and maintaining all EDA environments within the company, and managing the EDA team resources across multiple projects and teams. You will collaborate closely with the design and layout engineers in the tape-out flow process, and be instrumental ...

estimate effort, and support project schedules. Improve consistency and efficiency in layout planning and build reviews, including through the use of automation and EDA tooling. Serve as a primary point of contact for PCB layout planning and delivery status. Required Skills and QualificationsDemonstrated experience directing or supervising PCB layout ...

will have proven experience in delivering industry‐leading verification quality and productivity under tight schedules. In this role the candidate will collaborate with architecture, design and central formal verification teams to define our formal verification roadmap, strategy, methodology, infrastructure and expand formal verification adoption through project execution. The candidate … engines and use cases Proven expertise in system Verilog assertion and abstract model development Expert user of formal verification tools from both academia and EDA vendors (JasperGold, VC formal, Murphi, theorem prover) Proven track record of delivering high quality verification under tight schedule for modern, large‐scale processor design ...

smarts: from bespoke circuits to world-class machine learning accelerators. These high performance designs require even higher performance verification. We are looking for experienced Design Verification (DV) engineers who are skilled at writing testbenches … building verification environments to exercise complex HDL. Our ideal candidate is not only an ace tester, but a practicing toolsmith. You know the EDA landscape and want to be part of a team actively working to rethink, redesign, and surpass the status quo. For example, members of our team ...

currently seeking two Senior ASIC Design Engineers to join a well-established silicon design company based in Bristol. This is a fantastic opportunity to join an organisation at an exciting stage of growth as they accelerate their development programmes and collaborate with a globally recognised technology company. … VHDL or Verilog Experience with SystemVerilog Previous experience leading or owning ASIC design projects Knowledge of UVM verification methodologies Experience using industry-standard EDA tools Good understanding of SoC architectures, CPU architecture, and Digital Signal Processing (DSP) Why join? Work on technically challenging ASIC developments across multiple market sectors. ...

processors—including CPUs, GPUs, and neural accelerators and this is where you come in! You will be joining a Fabric IP company as a Design Verification Engineer, contributing your strong background in developing testbenches and writing test sequences for complex IPs. In this role, you will play a pivotal … years and current hands-on experience in block-level/IP-level/SoC-level verification Proficiency in Verilog, SystemVerilog Familiarity with industry-standard EDA tools for simulation and debug Deep experience with UVM-based testbenches Experience with modern programming languages like Python Knowledge of Arm AMBA protocols such ...

Based in Berkshire, Southern England, our leading Semiconductor client is recruiting for a Senior Analog IC Design Engineer. Excellent compensation packages on offer, plus visa sponsorship and relocation assistance. This is an exciting opportunity to work across analog and mixed-signal design, data converters, and power management, while … principal level. Essential experience: Strong background in analog IC design Hands-on experience with transistor-level CMOS design Proficiency with industry-standard EDA tools (e.g. Cadence) Solid understanding of noise, stability, matching, and low-power design Nice to have: Mixed-signal or audio-related circuit experience Deep ...

About the Role The Perforce IP Lifecycle Management (IPLM) suite - used by semiconductor and hardware design teams to manage their intellectual property (IP), releases, and dependencies at scale - includes a Python command-line client (pi), the IPLM API server, the PiCache caching layer, and a Web based interface. … Have Prior experience building or maintaining a Python CLI used by other engineers as part of their daily workflow. Exposure to IP lifecycle management, EDA tooling, or the semiconductor/hardware design domain. Experience with basic development on Microsoft Windows; building and packaging Windows applications. Hands ...

Overview: We are looking for an EDA Optimisation Engineer to support the data-driven optimisation, analysis and maintenance of Arm’s engineering platforms. This role will work as part of a team effort to improve system utilisation/efficiency/cost-performance and touch on forecasting accuracy and infrastructure strategy. … finance teams to ensure data-driven decision making. Required Skills and Experience : Background in distributed HPC, cloud environments, data engineering & analytics. Knowledge of EDA workflows and semiconductor engineering environments. Proficiency in Python and data analysis/ML frameworks. Ability to turn sophisticated data into clear, actionable strategy. “Nice To Have ...

formal verification methodology to achieve industry leading verification quality and productivity under tight schedule. In this role the candidate will work with architecture team, design team and central formal verification team to define our formal verification roadmap, strategy, methodology, infrastructure and expand formal verification adoption through project execution. … verification algorithms, engines and use casesProven expertise in system Verilog assertion and abstract model developmentExpert user of formal verification tools from both academy and EDA vendors (JasperGold, VC formal, Murphi, theorem prover)Proven track record of delivering high quality verification under tight schedule for modern, large scale processor design ...

wants to join a verification team using leading-edge tools and methodologies? Do you want to be part of the growth of our Design Center in Bristol? Are you fascinated by the future of mobility and want to play a key role at the #1 semiconductor partner … delivering to metric targets Capability to understand complex Design specifications , derive features, and test bench architectures from concept Capability to use industry-standard EDA tools Good time management skills and the ability to deliver high-quality requirements under pressure Aptitude for clear communication of issues and progress A safety ...