2 of 2 Electronic Design Automation Jobs in Gloucestershire

Sondrel is seeking an experienced Physical Design Engineer to join our team. As part of a dynamic physical implementation design team, you will be responsible for block development and potentially full chip responsibility, taking designs from RTL to GDS. This is an exciting opportunity for an individual who … self-motivated, detail-oriented, and passionate about contributing to the development of high-quality, cutting-edge designs. Key Responsibilities: Independent Work : Contribute to physical design projects with minimal supervision, delivering high-quality results. Problem Solving : Address and resolve moderate complexity design challenges, applying sound judgment to interpret results … Project Managers, Sales, Finance, and HR teams Supervises: Physical Design Team (2-3 engineers) External : Customers: Minimal technical engineer-to-engineer communication Suppliers: EDA Tool Vendors, Foundries, and Assembly Houses What We're Looking For: Qualifications Degree/Masters or PhD in Electrical Engineering, Computer Science, or a related More ❯

industry best practices. Cross-Functional Collaboration : Coordinate with cross-functional teams to define verification strategies and create comprehensive verification plans for SoC designs. Optimised Design Solutions : Deliver cutting-edge, optimised solutions for functional verification, ensuring high-quality outcomes. Recruitment Support : Contribute to the recruitment process by interviewing candidates and … Senior Engineers, Principal Engineers, Project Managers, and HR teams Supervises: Verification Team (including junior engineers) External : Customers: Minimal technical engineer-to-engineer communication Suppliers: EDA Tool Vendors, Foundries, and Assembly Houses What We're Looking For: Qualifications A degree, Master's, or PhD in a relevant subject. Typically, 5+ years … a team environment. A Master's or PhD in a related subject, with 5+ years of practical experience. Skills & Experience: Expertise in testbench architecture design and hands-on experience with System Verilog , UVM , ABV , and constrained random verification . Experience with PSL , SVA , e , VMM , OVM . Familiarity with More ❯