51 to 75 of 88 Electronic Design Automation Jobs in the UK

Chips (SoC’s) to help shape our future products.The role shall be based in either Southampton or Bristol with a primary focus on the design and development of embedded VHDL firmware for complex aircraft sensor and communication systems.You will be part of the Leonardo Airborne Communications product development group … mitigating technical risk for Firmware design activities.* Ability to communicate effectively across different disciplines both verbally and in written form.* Familiarity with Siemens EDA FPGA development tools including HDL Designer and ModelSim/Questa is an advantage.**It would be nice if you had:*** Awareness of Safety, Security ...

will have proven experience in delivering industry‐leading verification quality and productivity under tight schedules. In this role the candidate will collaborate with architecture, design and central formal verification teams to define our formal verification roadmap, strategy, methodology, infrastructure and expand formal verification adoption through project execution. The candidate … engines and use cases Proven expertise in system Verilog assertion and abstract model development Expert user of formal verification tools from both academia and EDA vendors (JasperGold, VC formal, Murphi, theorem prover) Proven track record of delivering high quality verification under tight schedule for modern, large‐scale processor design ...

experienced Physical Design Engineer looking for your next challenge? Aion Silicon is actively building a pipeline of talented engineers for future opportunities, and we’d love to hear from skilled professionals who are passionate about Physical Design. With design centres across the UK, Spain, Hyderabad, and Morocco … reliability. Tapeout & Foundry Handoff GDSII/OASIS generation and validation. Foundry rule compliance (DRC/LVS deck handling). Tapeout data preparation and documentation. EDA tool knowledge Essential with either Synopsys (e.g., design compiler, ICC2, Fusion Compiler, ICV, Primetime, StarRC) and/or Cadence (Genus, Innovus, Tempus, Voltus ...

implementations of electronic systems for communications using SystemVerilogSkills, Knowledge and ExpertiseEssential: Degree qualified (or equivalent)4+ years of relevant industry experienceExperience with EDA tools for simulation and synthesis, such as Mentor Graphics ModelSim, Altera Quartus, Xilinx Vivado, Synopsys DC, or Cadence GenusExperience with AXI interfacingExperience with timing and hardware … with version control and peer review, e.g. GitExperience with technical documentation tools, e.g. ConfluenceExperience with project and task management tools, e.g. JiraDesirable: Experience maintaining EDA tools, including upgrades and licence managementExperience creating innovative engineering solutions and documenting them through publications or patentsExperience with automation and CI tools, e.g. JenkinsKnowledge ...

engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary We are looking for high-quality silicon physical design engineers to complement our existing exceptional team. We have a range of roles available with focus on those with extensive ranges of skills … leading-edge process technologies while meeting ambitious development schedules. Contributions are expected to span multiple areas and involve: using state-of-the-art EDA tools and in-house Graphcore flows to deliver final designs that are of sign-off quality enhancing existing flows and in-house tools/APIs ...

System-on-Chips (SoC’s) to help shape our future products. The role shall be based in Basildon with a primary focus on the design and development of embedded VHDL firmware for complex airborne electro-optics subsystems. You will be part of the Leonardo Sensors product development group within … technical decisions and mitigating technical risk forFirmware designactivities. Ability to communicate effectively across different disciplines both verbally and in written form. Familiarity with Siemens EDA FPGA development tools including HDL Designer and ModelSim/Questa is an advantage. It would be nice if you had: Awareness of Safety, Security ...

Based in London, this is a unique opportunity for a Principal EDA Engineer to join a well-funded deep-tech company building next-generation quantum computing hardware and software. This role offers hybrid working, and the chance to work on breakthrough computing technology that has the potential to redefine … entire industry. As the Principal EDA Engineer you will be developing and maintaining all EDA environments within the company, and managing the EDA team resources across multiple projects and teams. You will collaborate closely with the design and layout engineers in the tape-out flow process, and be instrumental ...

project activities of each Tech Lead, through regular catch ups and/or reviewing the reporting materials that they generate to their project design authority. Periodically review each Tech Lead’s L4 project plans. With knowledge of each Tech Lead’s project activities and plans, provide pro-active guidance … actual gate review takes place. To be an escalation route to support realistic cost effective technical delivery solutions (Stakeholders include Head of Actuators, Equipment EDA, Head of Equipment Delivery). Tailor the level of support and involvement as appropriate, based on the needs of each individual team Tech Lead. Investigate ...

Senior FPGA/ASIC Design Engineers - 5G & Satellite Technology Spectrum IT Recruitment is working with a cutting-edge technology business in Southampton that is expanding its engineering team and looking for multiple Senior Design Engineers with strong FPGA/ASIC experience. This is an opportunity to work … synthesis and timing analysis Knowledge of high-throughput data or signal-processing designs Experience optimising timing and hardware resources Strong knowledge of industry-standard EDA simulation and synthesis tools Experience delivering complex, integrated digital designs Additional experience with 5G, communications/DSP algorithms, UVM, AMBA, SystemC/C++, PCIe, JESD ...

smarts: from bespoke circuits to world-class machine learning accelerators. These high performance designs require even higher performance verification. We are looking for experienced Design Verification (DV) engineers who are skilled at writing testbenches … building verification environments to exercise complex HDL. Our ideal candidate is not only an ace tester, but a practicing toolsmith. You know the EDA landscape and want to be part of a team actively working to rethink, redesign, and surpass the status quo. For example, members of our team ...

About the Role The Perforce IP Lifecycle Management (IPLM) suite - used by semiconductor and hardware design teams to manage their intellectual property (IP), releases, and dependencies at scale - includes a Python command-line client (pi), the IPLM API server, the PiCache caching layer, and a Web based interface. … Have Prior experience building or maintaining a Python CLI used by other engineers as part of their daily workflow. Exposure to IP lifecycle management, EDA tooling, or the semiconductor/hardware design domain. Experience with basic development on Microsoft Windows; building and packaging Windows applications. Hands ...

Overview: We are looking for an EDA Optimisation Engineer to support the data-driven optimisation, analysis and maintenance of Arm’s engineering platforms. This role will work as part of a team effort to improve system utilisation/efficiency/cost-performance and touch on forecasting accuracy and infrastructure strategy. … finance teams to ensure data-driven decision making. Required Skills and Experience : Background in distributed HPC, cloud environments, data engineering & analytics. Knowledge of EDA workflows and semiconductor engineering environments. Proficiency in Python and data analysis/ML frameworks. Ability to turn sophisticated data into clear, actionable strategy. “Nice To Have ...

growing our diverse team, and you'll contribute to the development and verification of next-generation neural network hardware! Collaborating with experts across global design centers, you'll help deliver Arm's next-generation IP using sophisticated tools and methodologies. As a System Test Engineer, you will make … experience with emulation platforms such as ZeBu, Palladium, or Strato. Familiarity with RTL languages such as SystemVerilog/Verilog Experience in collaboration with EDA vendors to introduce new capabilities, resolve tool issues, and contribute to future tool improvements. Skilled in planning system test tasks and producing realistic effort and time ...

wants to join a verification team using leading-edge tools and methodologies? Do you want to be part of the growth of our Design Center in Bristol? Are you fascinated by the future of mobility and want to play a key role at the #1 semiconductor partner … delivering to metric targets Capability to understand complex Design specifications , derive features, and test bench architectures from concept Capability to use industry-standard EDA tools Good time management skills and the ability to deliver high-quality requirements under pressure Aptitude for clear communication of issues and progress A safety ...

Expertise in hardware verification languages, particularly System Verilog and UVM, with the ability to design efficient and effective test bench architectures Familiarity with EDA tools for Design and Simulation, as well as scripting languages such as Python or Perl Knowledge of functional safety standards, including ISO26262 and ASIL ...

quality and bring down costs, then this is the role for you. You’ll work closely with colleagues across modelling, system architecture, and RTL design to ensure our RTL releases meet the highest standards of functional quality. That includes contributing to discussions around specification, architecture, and the workflows that … Assertions (SVA) Software fluency in multiple languages Open source tools for silicon development Cocotb (used for all our testbench collateral), Verilator, Icarus Verilog Commercial EDA tools Formal verification Bazel is our chosen tool, familiarity is not expected Contributing to architecture discussions How we work Ownership and execution: you will have ...

next-generation compute architectures, developing high-performance, power-efficient CPU technology on the most advanced process nodes, is looking for an experienced Physical Design Engineer to join its growing team. You will play a key role in the implementation of cutting-edge CPU IP within a world-class engineering …/SoC designs Experience across the full implementation flow including floorplanning, place and route, CTS and physical sign-off Familiarity with industry-standard EDA tools such as Innovus, ICC2, Fusion Compiler or equivalent Good understanding of timing closure, power optimisation and physical verification methodologies Strong scripting skills with TCL, Python ...

understanding through to tape-out. Define system architecture, instruction set architecture (ISA) and dataflow models based on workload requirements. Perform HW/SW co-design activities, including arithmetic implementation and analysis of programmability and host requirements. Build functional simulations and performance models to guide architectural decisions. Conduct timing, power … architectural trade-off analysis using Python, C++ or similar languages. Experience with industry-standard semiconductor tool flows such as Synopsys, Cadence or Siemens EDA tools. Solid understanding of timing, power and area optimisation at the architectural level. Experience defining hardware/software interfaces and collaborating with firmware and compiler teams. ...

understanding through to tape-out. Define system architecture, instruction set architecture (ISA) and dataflow models based on workload requirements. Perform HW/SW co-design activities, including arithmetic implementation and analysis of programmability and host requirements. Build functional simulations and performance models to guide architectural decisions. Conduct timing, power … architectural trade-off analysis using Python, C++ or similar languages. Experience with industry-standard semiconductor tool flows such as Synopsys, Cadence or Siemens EDA tools. Solid understanding of timing, power and area optimisation at the architectural level. Experience defining hardware/software interfaces and collaborating with firmware and compiler teams. ...

live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological … Together, you’ll collaborate with Sales, R&D, and global engineering teams to drive customer success, influence product direction, and support Synopsys’ leadership in EDA innovation. Your team values diversity, open communication, and continuous professional growth, fostering an inclusive and supportive work environment. Rewards and Benefits: We offer a comprehensive ...

quality and bring down costs, then this is the role for you. You’ll work closely with colleagues across modelling, system architecture, and RTL design to ensure our RTL releases meet the highest standards of functional quality. That includes contributing to discussions around specification, architecture, and the workflows that … Assertions (SVA) Software fluency in multiple languages Open source tools for silicon development Cocotb (used for all our testbench collateral), Verilator, Icarus Verilog Commercial EDA tools Formal verification Bazel is our chosen tool, familiarity is not expected Contributing to architecture discussions #J-18808-Ljbffr ...

quality and bring down costs, then this is the role for you. You’ll work closely with colleagues across modelling, system architecture, and RTL design to ensure our RTL releases meet the highest standards of functional quality. That includes contributing to discussions around specification, architecture, and the workflows that … Assertions (SVA) Software fluency in multiple languages Open source tools for silicon development Cocotb (used for all our testbench collateral), Verilator, Icarus Verilog Commercial EDA tools Formal verification Bazel is our chosen tool, familiarity is not expected Contributing to architecture discussions #J-18808-Ljbffr ...

quality and bring down costs, then this is the role for you. You’ll work closely with colleagues across modelling, system architecture, and RTL design to ensure our RTL releases meet the highest standards of functional quality. That includes contributing to discussions around specification, architecture, and the workflows that … Assertions (SVA) Software fluency in multiple languages Open source tools for silicon development Cocotb (used for all our testbench collateral), Verilator, Icarus Verilog Commercial EDA tools Formal verification Bazel is our chosen tool, familiarity is not expected Contributing to architecture discussions How we work Ownership and execution: you will have ...

mixed-signal components (ADC/DAC, PLL, SERDES, etc.)Support application of radiation-hardening techniques for space environmentsDrive continuous improvement in development processes and EDA workflowsTeam & Cross-Functional CollaborationLead and mentor ASIC engineers and designers across geographically distributed teamsFoster a collaborative, high-performance engineering cultureWork closely with product architects … full productizationStrong hands-on expertise in: RTL design and digital IP integrationVerification and validation methodologiesHardware emulation and DFTPhysical implementation and tape-out flowsModern EDA toolchainsTechnical knowledge of mixed-signal subsystems including high-speed ADC/DAC, PLLs, SERDESExperience with radiation-hardening techniques for high-reliability or space applicationsPersonal ProfileTechnically ...

Swedium Global is having presence in Sweden, Finland, Poland, Czech Republic and in India. Location - Remote from UK/EU Job Title - Senior Physical Design Engineer We are looking for Physical Design (PD) and Static Timing Analysis (STA) Engineers . Key Responsibilities Perform Static Timing Analysis … corners OCV/AOCV/POCV MCMM analysis Signal integrity/crosstalk Timing ECOs Hands-on experience with Synopsys and/or Cadence EDA tools . Preferred Tools #J-18808-Ljbffr ...