experienced Firmware Engineer to work within an innovative team, delivering cutting-edge digital systems designed to meet complex future customer requirements. Key Responsibilities: Design and implement Firmware using Xilinx, TCL, Verilog, System Verilog, and UVM. Work with FPGA architectures including Xilinx 7, Xilinx UltraScale, Intel (Altera), or Microsemi (Actel). Utilise fast interfaces such as PCIe, Ethernet, and JESD. Generate More ❯
Reading, Berkshire, South East, United Kingdom Hybrid / WFH Options
Fortis Recruitment Solutions
FPGA implementation Experience with ASIC flows or FPGA-ASIC migration Familiarity with standards/quality in the aerospace/space domain (e.g. radiation mitigation, reliability) Experience with scripting (Python, Tcl, Bash, etc.) for automation and flow integration Knowledge of formal verification, constraint generation, or static analysis tools Experience working in remote/hybrid settings, distributed teams What We Offer Competitive More ❯
/h (Umbrella) Responsibilities : Artificial Intelligence, including machine learning and genetic algorithms Auto-generated code using model driven engineering using MATLAB and Simulink tools Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM Derivation of detailed Firmware requirements and architecture from system requirements A structured approach to firmware design (RTCA DO-254 or similar) Experience required: FPGA architectures More ❯
a multidisciplinary team to solve complex problems. Stay updated with the latest FPGA technologies and design tools. Required Skills & Qualifications: Extensive experience with VHDL for FPGA development. Proficient with TCL scripting and Modelsim/Questasim. Familiarity with current FPGA and SoC technologies, including Quartus tool chain. Degree or postgraduate degree in a relevant STEM subject. Ability to produce high-quality More ❯
Cambridge, Cambridgeshire, United Kingdom Hybrid / WFH Options
ECM Selection (Holdings) Limited
analyses) or similar. Additional experience with radio frequency systems, DSP, embedded software and/or requirements management using DOORS would be beneficial. Further experience with C++, VHDL, Python and Tcl would be desirable. Due to the nature of projects, the role is mostly onsite, although occasional home working is possible when projects allow. In return, on offer is a competitive More ❯
of data structures, algorithms and databases Demonstrated proficiency in modern C++, debugging, and general software development skills Nice to have: Scripting language skills in one of: Lisp, Skill, Python, TCL Interest in digital or analog circuit design Experience with GUI frameworks, such as Qt, MFC (Windows) Familiarity with development on Linux/Unix or Windows Exposure to build and version More ❯
Engineers for contracts based in Luton, Bedfordshire. The Firmware Engineer will deliver Firmware for complex digital systems that meet challenging future customer requirements. Responsibilities Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet, and JESD is also required. More ❯
Configuration Vectors etc. Programming and scripting languages, particularly writing and debugging Linux/Unix bash scripts is an advantage. Knowledge of a programming language such as C, Java, python, TCL, VBA would be useful but not essential. Competent in the use of various test equipment used for electrical measurements, e.g. DMM, oscilloscope, current probes, Data acquisition unit, data bus monitors More ❯
Southampton, Hampshire, South East, United Kingdom Hybrid / WFH Options
Fortis Recruitment Solutions
e.g. error correction, equalisation, beamforming, channel estimation) Familiarity with AMBA bus protocols Practical experience with UVM verification methodologies C++/SystemC experience for modelling and integration Scripting skills (Python, Tcl, Bash) for automation and flows Understanding of project methodologies (agile, waterfall, requirements traceability) Experience with AMD/Xilinx FPGAs and/or ASIC backend EDA flows What We Offer Competitive More ❯
Oxford, England, United Kingdom Hybrid / WFH Options
IC Resources
and verification, including: Defining functional requirements for verification environments & metrics SystemVerilog UVM testbenches Formal proof verification Understanding of C test cases and C code Scripting languages (e.g. Python, Perl, TCL) Desirable skills Experience with formal verification tools (JasperGold, VC Formal) Familiarity with C/C++ development Prior SSD experience with storage interfaces such as SAS or PCIe (NVMe preferred) What More ❯
banbury, south east england, united kingdom Hybrid / WFH Options
IC Resources
and verification, including: Defining functional requirements for verification environments & metrics SystemVerilog UVM testbenches Formal proof verification Understanding of C test cases and C code Scripting languages (e.g. Python, Perl, TCL) Desirable skills Experience with formal verification tools (JasperGold, VC Formal) Familiarity with C/C++ development Prior SSD experience with storage interfaces such as SAS or PCIe (NVMe preferred) What More ❯
and attention to detail. Ability to work effectively within multidisciplinary teams and liaise directly with clients. Desirable: Familiarity with version control systems (e.g., Git, SVN). Scripting experience in TCL or Python for tool automation. Additional Information: Due to the sensitive nature of the work, successful candidates must be eligible for UK Security Clearance. Pre-employment screening will be required. More ❯
Stevenage, Hertfordshire, South East, United Kingdom
Morson Talent
and network administration (firewalls, local config) Knowledge of spacecraft/bus interfaces (MIL-1553, SpaceWire, CAN, RS232/422) Ability to write scripts/test sequences (e.g. Bash, Python, TCL, VBA, C/Java advantageous) Willingness to travel and support extended hours during campaigns More ❯
Stevenage, Hertfordshire, South East, United Kingdom
Morson Talent
test sequences (CCS/ATP or similar) Strong spacecraft system awareness (TM/TC, MIL-1553, SpaceWire, FDIR, AOCS, power, thermal) Experience with C/Java/Python/TCL/VBA or bespoke test languages (e.g. Elisa) Comfortable with Linux/Windows test environments & standard electrical lab instruments Experience supporting environmental/launch test campaigns and NRBs/TRBs More ❯
Stevenage, Hertfordshire, South East, United Kingdom
Yolk Recruitment
Configuration Vectors etc. Programming and scripting languages, particularly writing and debugging Linux/Unix bash scripts is an advantage. Knowledge of a programming language such as C, Java, python, TCL, VBA would be useful but not essential. Competent in the use of various test equipment used for electrical measurements, e.g. DMM, oscilloscope, current probes, Data acquisition unit, data bus monitors More ❯
Engineers for contracts based in Luton, Bedfordshire. The Firmware Engineer will deliver Firmware for complex digital systems that meet challenging future customer requirements. Responsibilities Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces s... More ❯
timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and floating-point design. Design-for-test More ❯
timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and floating-point design. Design-for-test More ❯
timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and floating-point design. Design-for-test More ❯
timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and floating-point design. Design-for-test More ❯
london (city of london), south east england, united kingdom
IC Resources
timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and floating-point design. Design-for-test More ❯
timing closure, CDC, RDC, and coverage analysis. Profile Essential Skills Degree in Computer Science, Engineering, or related field. Strong experience with SystemVerilog or VHDL . Competence in scripting (Python, Tcl). Knowledge of digital design flows. Desirable Experience Processor design and application-specific blocks. High-speed serial interfaces & complex third-party IP integration. Arithmetic pipeline and floating-point design. Design More ❯
Engineers for contracts based in Luton, Bedfordshire. The Firmware Engineer will deliver Firmware for complex digital systems that meet challenging future customer requirements. Responsibilities Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7 click apply for full job details More ❯
design, ideally including work at 7nm or below Practical knowledge of timing closure, clock tree design, physical verification, and sign-off processes Strong scripting/programming ability (e.g. Python, Tcl) Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/ More ❯
design, ideally including work at 7nm or below Practical knowledge of timing closure, clock tree design, physical verification, and sign-off processes Strong scripting/programming ability (e.g. Python, Tcl) Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/ More ❯