1 to 25 of 60 Tcl Jobs in the UK

prior to implementation. Key Requirements: Strong FPGA/SoC design background with RTL skills in (System) Verilog and scripting skills in languages such as TCL, Python, etc. Experience implementing designs on AMD Xilinx UltraScale devices using the Vivado tool suite. Detailed understanding of timing constraints and ability to improve designs More ❯

Test & Measurement or scientific markets. Experience with tools such as Vivado, Modelsim, Visual Studio, Git, and Jira, as well as scripting languages (Python, Perl, TCL), Clock Domain Crossing techniques, and High-Level Synthesis, will be an advantage. We are looking for a detail-oriented, creative, and organised individual who can More ❯

Test & Measurement or scientific markets. Experience with tools such as Vivado, Modelsim, Visual Studio, Git, and Jira, as well as scripting languages (Python, Perl, TCL), Clock Domain Crossing techniques, and High-Level Synthesis, will be an advantage. We are looking for a detail-oriented, creative, and organised individual who can More ❯

verification environments. Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. SystemVerilog, shell programming/scripting (e.g. Tcl, Perl, Python etc.). Experienced in one or more of various verification methodologies - UVM/OVM, formal, low power, emulation. Exposure to all stages of More ❯

/CD, Artifactory. Experience with application layer protocols, such as DNP, 1588, MQTT, and more. Knowledge of electronic components and PCB reworking. Experience with TCL scripting. Equal Employment Opportunity Statement Individuals seeking employment at Camlin are considered without regard to race, colour, religion, national origin, age, sex, marital status, ancestry More ❯

Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols – Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git VHDL High speed transceivers Memory controllers PCB Layout ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits More ❯

Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git VHDL High speed transceivers Memory controllers PCB Layout Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits More ❯

Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git VHDL High speed transceivers Memory controllers PCB Layout ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits More ❯

Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols – Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git VHDL High speed transceivers Memory controllers PCB Layout ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits More ❯

GTM and F-Tile transceivers Expertise in FPGA tool flows: synthesis, partitioning, place & route, timing analysis Strong skills in SystemVerilog, Verilog, VHDL, and scripting (tcl and Python) Experience with high-performance FPGA devices such as Xilinx Versal Premium or Intel Agilex 7 If you're interested in the position of More ❯

GTM and F-Tile transceivers Expertise in FPGA tool flows: synthesis, partitioning, place & route, timing analysis Strong skills in SystemVerilog, Verilog, VHDL, and scripting (tcl and Python) Experience with high-performance FPGA devices such as Xilinx Versal Premium or Intel Agilex 7 If you're interested in the position of More ❯

verification environments. Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. (SystemVerilog), shell programming/scripting (e.g. Tcl, Perl, Python etc.). Experienced in one or more of various verification methodologies - UVM/OVM, formal, low power, emulation. Exposure to all stages of More ❯

verification environments. Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. (SystemVerilog), shell programming/scripting (e.g. Tcl, Perl, Python etc.). Experienced in one or more of various verification methodologies - UVM/OVM, formal, low power, emulation. Exposure to all stages of More ❯

co-verification and multi-mode simulation . Familiarity with HW acceleration techniques like emulation . Experience with verification infrastructure automation (e.g., Perl, Python, Java, Tcl, IP-XACT, UCDB ). Strong knowledge of C programming for verification tasks. Demonstrated ability to listen to customer feedback , recognise opportunities for technical innovation , and More ❯

co-verification and multi-mode simulation . Familiarity with HW acceleration techniques like emulation . Experience with verification infrastructure automation (e.g., Perl, Python, Java, Tcl, IP-XACT, UCDB ). Strong knowledge of C programming for verification tasks. Demonstrated ability to listen to customer feedback , recognise opportunities for technical innovation , and More ❯

knowledge of FPGA tool flows (synthesis, partitioning, place & route, timing analysis). Excellent skills in SystemVerilog/Verilog/VHDL. Scripting in Python/Tcl Driver expertise The company offer an excellent salary, along with a bonus up to 85%, flexible and hybrid working, exciting technology and a great team More ❯

knowledge of FPGA tool flows (synthesis, partitioning, place & route, timing analysis). Excellent skills in SystemVerilog/Verilog/VHDL. Scripting in Python/Tcl Driver expertise The company offer an excellent salary, along with a bonus up to 85%, flexible and hybrid working, exciting technology and a great team More ❯

Engineer desirable requirements: PCI Express, Ethernet, CoaXPress, MIPI, QSFP and DDR4/5. JTAG-based test, (XJTAG ideal). C/C++, Python/TCL/Shell CI/CD Agile ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Position : FPGA Engineer Location : Slough Salary : £45-60k Key Skills : FPGA design Desirable skills : PCI Express, Ethernet, CoaXPress More ❯

of ASIC/FPGA design techniques and methodologies. Hands-on RTL Design – Experience at IP or SoC level using SystemVerilog, C++, Python, Perl, or TCL . Verification Knowledge – Familiarity with UVM, formal verification, assertions, and coverage bins . Experience with GPU/CPU design – Understanding of CPU, DSP, or FPU More ❯

of ASIC/FPGA design techniques and methodologies. Hands-on RTL Design – Experience at IP or SoC level using SystemVerilog, C++, Python, Perl, or TCL . Verification Knowledge – Familiarity with UVM, formal verification, assertions, and coverage bins . Experience with GPU/CPU design – Understanding of CPU, DSP, or FPU More ❯

Cloud-based solutions Knowledge of standard interface protocols such as PCIe, AMBA, USB, DDR, DisplayPort, etc. Commercial awareness of EDA companies and solutions Linux, Tcl/Python/shell, C/C++, DPI, SCE-MI, SystemC, UVM Connect, UVM Framework Background in consulting or other customer services subject area About More ❯

experience of PCB schematic capture using suitable CAD software. A familiarity with programming and scripting skills in one or more of VB script, python, tcl & bash. Ability to do basic statistical and data analysis for silicon devices and test results. Who You Are: You are an analytical thinker with excellent More ❯

experience of PCB schematic capture using suitable CAD software. A familiarity with programming and scripting skills in one or more of VB script, python, tcl & bash. Ability to do basic statistical and data analysis for silicon devices and test results. Who You Are: You are an analytical thinker with excellent More ❯

on experience with HDL: Verilog, System Verilog, or VHDL. Excellent logical reasoning and a quick learner with good communication skills. Good in scripting using TCL, Perl. Comfortable with Unix, Linux environment. Exposure to the industry standard tools in VLSI digital design will be preferred. Company Description Renesas is one of More ❯

/or VHDL. Strong verification mindset with in-depth knowledge of verification goals, practices, and methodologies. Practical experience with scripting languages such as csh, Tcl, Python, Perl, etc. Excellent verbal communication and documentation skills, with the ability to work effectively within cross-functional teams. Additional Information: This is an on More ❯