1 to 25 of 37 Verilog Jobs in Cambridgeshire

role DV Engineer, Senior : Design Verification of custom V&M and IoT IP and SoCs, including: Design analysis for testability Test planning Test bench and infrastructure development using System Verilog and UVM IP level test development using System Verilog and UVM IP level test development using Formal Methods SoC level test development using System Verilog and embedded C code Work … is in a dynamic team environment. Skills and Experience we would love to see Experience of System Verilog, Verilog Experience of UVM Experience of C or other high-level languages SV-UVC development UVM testcase development Strong debug skills Knowledge of Standard interfaces, Bus protocols and Processor architectures Proven track-record of delivering quality verification on time Enthusiasm to learn … Science, Masters - Electrical Engineering Work Experiences: 3 yrs+ in an appropriate Design Verification role, with hands-on experience of designing and coding UVM UVCs and test cases. Skills: System Verilog, UVM, Embedded C, Design Verification, Python WE INVENT THE TECH THE WORLD LOVES, SO IF YOU ARE INTERESTED IN LEARNING MORE What's on Offer Apart from working in an More ❯

UK office. Your CV will show your: Good degree in electronics or another technical subject from a top university Extensive experience developing complex and well-structured RTL in SystemVerilog, Verilog or VHDL, with particular attention to design approach and performance constraints And as a skilled FPGA Design Engineer you will also have, as your CV demonstrates: A strong understanding of More ❯

likely have a decade or more of relevant experience and be confident both in code and concept. Essential: Strong track record in DSP algorithm development for FPGAs VHDL or Verilog design and simulation experience Familiarity with signal processing theory, modulation/demodulation, and filtering Experience working in cross-disciplinary teams on complex hardware systems UK Defence, security, or high-assurance More ❯

tools including Lint, CDC, Synthesis, Power analysis tools. Planning, reporting status and communicating progress against expectations. Required Competencies Effective communicator with strong technical presentation skills. RTL design in System Verilog and expert digital design knowledge. Able to work autonomously and demonstrate technical competency. Knowledge of DSP design for Audio signal processing. Knowledge of power reduction techniques (DVFS, power gating, DMA More ❯

tools including Lint, CDC, Synthesis, Power analysis tools. Planning, reporting status and communicating progress against expectations. Required Competencies Effective communicator with strong technical presentation skills. RTL design in System Verilog and expert digital design knowledge. Able to work autonomously and demonstrate technical competency. Knowledge of DSP design for Audio signal processing. Knowledge of power reduction techniques (DVFS, power gating, DMA More ❯

and experience: Experience in ASIC RTL design, ideally for Multimedia IP (ISPs, DPUs, VPUs) or related IP (CPU, GPU, interconnect, memory controllers, high-performance peripherals). Proficiency in System Verilog, Verilog or VHDL. Exposure to all stages of design: concept, specification, implementation, testing, documentation, and support. Proficiency in UNIX and scripting languages such as TCL, Perl, Python, or shell scripting. More ❯

cases and regression suites to improve verification efficiency and coverage. Required Skills and Experience : Solid understanding of SoC Verification (using C Testcases), hardware description and verification languages e.g. SystemVerilog, Verilog, VHDL. Understanding of Computer architecture, bus protocols (e.g., AXI, AHB), and peripherals. Experience with Tcl, Python or other scripting languages. "Nice To Have" Skills and Experience : Experience with ARM-based More ❯

digital design, verification, and synthesis, while targeting advanced semiconductor technologies down to 2nm process nodes. What we need from you: Design & Modelling Proficient in modeling digital systems using VHDL, Verilog, and SystemVerilog Strong foundation in combinational and sequential logic , including FSMs, pipelines, and datapaths Skilled in Register-Transfer Level (RTL) design with a focus on modular, reusable, and synthesizable components More ❯

techniques Providing technical support for customer engagements Requirements: Masters degree in Engineering, Mathematics or other Scientific DisciplineAt least 5 years' experience generating clear, well-documented, and well-tested SystemVerilog, Verilog or VHDL code Experience simulating and verifying large RTL designsWorked with FPGA EDA tools such as Quartus or Vivado Worked with software languages such as C, C++, Python Familiarity with More ❯

help build low-latency/high-throughput applications. What skills and experience is required: FPGA Design, development and testing experience Previous experience in using SystemVerilog, VHDL and/or Verilog Software skills using C/C++ or Python Exposure to Quartus and/or Vivado Any exposure or understanding of low latency, machine learning, or neutral network architectures would be More ❯

Embedded systems ideally with experience of system software and device drivers Understanding of server system architectures e.g. PCI-Express Experience of linux systems Experience of digital design (EDA tools, Verilog, VHDL) Benefits offered are described: AMD benefits at a glance . AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries More ❯

all stages of unit verification, including collecting requirements, defining test methodologies, writing test plans, developing testbenches and test cases, and driving verification closure. Strong hands-on experience in System Verilog and UVM methodology, with a solid background in Object-Oriented programming. Proven ability to debug complex designs and verification environments. Experience owning verification environments across multiple stages of verification, from More ❯

contributing to all phases of the verification flow in order to ensure the high-quality and on time deliveries. Required Skills and Experience Strong hands-on experience in System Verilog and UVM methodology OR formal verification Exposure to all stages of unit verification: collection of requirements, defining test methodologies, writing test plans, developing testbenches and test cases, debugging complex designs More ❯

similar (PhD or relevant experience in industry would be a plus!). Design and Verification of embedded electronics systems, HW and SW architectures, with experience of HDL languages, i.e. Verilog, VHDL and programming languages, i.e. Assembler, C, C++, Python. Experienced with authoring and reviewing high-level quality documentation. Strong interpersonal skills to convey sophisticated technical information efficiently. We seek enthusiasm More ❯

professionals and hit the ground running and looking to start ASAP. At least twice a week in the office. Required: FPGA design with at least one of VHDL/Verilog/Systemverilog Xilinx ISE toolchain experience Telecommunications background preferred Please apply your latest CV if you have the above experience. More ❯

professionals and hit the ground running and looking to start ASAP. At least twice a week in the office. Required: FPGA design with at least one of VHDL/Verilog/Systemverilog Xilinx ISE toolchain experience Telecommunications background preferred Please apply your latest CV if you have the above experience. More ❯

A degree in Electronics, Electrical Engineering, Software, or Computer Science Experience developing circuitry and control systems Experience in Architecting and writing firmware in one or more of C, C++, Verilog or VHDL Strong team player and collaborator Experience in medical and life sciences sectors is highly desired Experience in a design consultancy is highly desired Benefits Package of the Principal More ❯

SDRAM, Wi-Fi, SDIO/eMMC, MIPI CSI/DSI Experience of interconnect standards ACE, AXI, AHB, and APB Ability to form requirements and specify architectural features Expert-level Verilog/SystemVerilog for design and verification Familiarity with scripting languages (Bash, Python, Tcl, etc) The following would also be useful: Experience of Cadence simulation tool flow Experience with ASIC/ More ❯

and digital aspects of receiver design A deep understanding of SDR architecture, DSP theory, and RF signal processing Hands-on experience with tools such as MATLAB, Simulink, VHDL, or Verilog Familiarity with FPGAs and implementing DSP algorithms in embedded systems Knowledge of radio propagation, interference mitigation, and system-level testing At least 10 years' experience in DSP, RF, and communications More ❯

review test plans, help debug design issues, and work with the implementation team to optimize designs. Required Skills and Experience: Experience in RTL design for complex SoC development using Verilog and/or SystemVerilog. Knowledge or experience in static design checks, synthesis and timing analysis, power management techniques, and power and clock domain crossing. An understanding of computer architecture and More ❯

Engineering, Computer Engineering, or Computer Science. Solid understanding of emulation methodologies and flows. Experience with emulation platforms such as ZeBu, Palladium, or Strato. Familiarity with RTL languages (SystemVerilog/Verilog) and UVM-based verification environments. Hands-on experience in compiling and debugging large-scale designs on emulation platforms. Proficiency in scripting (Python, Perl, or similar) to automate workflows and diagnostics. More ❯

development from circuit design to prototyping and working with FPGA design, PCB layouts and embedded systems. You’ll need: PCB layout and schematic design experience Knowledge of VHDL or Verilog based FPGA Design Knowledge of PCIe, SPU, I2C etc A background in Digital Signal Processing (preferred) Experience with high-speed digital design (preferred) There are great salary and bonus packages More ❯

help build low-latency/high-throughput applications. What skills and experience is required: FPGA Design, development and testing experience Previous experience in using SystemVerilog, VHDL and/or Verilog Exposure to Quartus and/or Vivado Any exposure or understanding of low latency, machine learning, or neutral network architectures would be beneficial but not essential. *Visa Sponsorship is available More ❯

PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. Preferred Skills: • Simulation based verification using UVM/System Verilog What's on Offer Apart from working in an open, relaxed and collaborative space, you will enjoy: Salary, stock and performance related bonus Employee stock purchase scheme Matching pension scheme More ❯

Closure, CoverageWork closely with cross-functional teams including Verification, Physical Design, and DFT Required Skills & Experience: Strong experience in digital design with hands-on RTL developmentSolid understanding of System Verilog or VHDLFamiliarity with EDA tools and digital design flowsExperience writing scripts (Python, Tcl) for design automation and issue resolution Excellent communication and collaboration skills across teamsAbility to manage workload effectively More ❯