26 to 50 of 171 ASIC Jobs in England

verification, and process technology, to optimise performance, power, and area (PPA) while ensuring design integrity and manufacturability. Key Responsibilities: Drive the physical implementation of ASIC/SoC designs, including floorplanning, placement, clock tree synthesis (CTS), routing, and sign-off. Work on synthesis, timing analysis (STA), and optimisation to achieve ...

contribute to product quality and release decisions What You Need Strong experience in bare metal environments and post-silicon validation processes applied in digital ASIC environments Strong understanding of SoC and platform architectures Expertise in debug infrastructure and post‐silicon debug methodologies Strong programming skills in Python, C, or debug ...

maintaining high performance drivers for the Linux kernelDesign and develop new groundbreaking AMD technologies Submit driver changes to the upstream Linux kernelParticipating in new ASIC and hardware bring ups Debugging/fix existing issues and research alternative, more efficient ways to accomplish the same work Develop technical relationships with peers ...

related field. Nice to have Experience with dataflow or non‐GPU accelerator architectures; pre/post‐silicon bring‐up on custom hardware (ASIC/FPGA); production observability at scale (hardware counters, Prometheus/Grafana‐style export, device and cluster views). Compensation & Equity Competitive Salary: Commensurate with your experience, skills ...

At Universal Quantum, we aim to make the world a better place by developing a new computer technology. Together, we are creating truly impactful quantum computers. Our machines will be capable of solving problems until ...

design using System Verilog, Verilog, or VHDLAbility to navigate high-level design trade-offs and articulate the rationale behind those decisionsKnowledge of ASIC (or FPGA) design methodology and IP signoff methods with a deep understanding of timing/area/complexity trade-offs for complex data-path designsExperience with static ...

similarly large, complex systemsA good understanding of modern 3D graphics and/or compute APIs, such as Vulkan, D3D12 and OpenCLAn understanding of digital ASIC design methodologies and constraintsThe ability to plan, estimate and track your own workExperience in independently driving architecture exploration activities that conclude with tangible and appropriate ...

similarly large, complex systemsA good understanding of modern 3D graphics and/or compute APIs, such as Vulkan, D3D12 and OpenCLAn understanding of digital ASIC design methodologies and constraintsThe ability to plan, estimate and track your own workExperience in independently driving architecture exploration activities that conclude with tangible and appropriate ...

similarly large, complex systemsA good understanding of modern 3D graphics and/or compute APIs, such as Vulkan, D3D12 and OpenCLAn understanding of digital ASIC design methodologies and constraintsThe ability to plan, estimate and track your own workExperience in independently driving architecture exploration activities that conclude with tangible and appropriate ...

complex systems A good understanding of modern 3D graphics and/or compute APIs, such as Vulkan, D3D12 and OpenCL An understanding of digital ASIC design methodologies and constraints The ability to plan, estimate and track your own work Experience in independently driving architecture exploration activities that conclude with tangible ...

brands. They seek a Staff AMS Verification Engineer to be responsible for ensuring the functional correctness and robustness of complex analog and mixed-signal ASIC designs through advanced verification methodologies. Working closely with architects, designers, DFT, and the verification team, you will deliver high-quality silicon solutions and enjoy ...

engineering challenges while influencing technical direction on projects. They are looking for an FPGA Engineer with the following background: Proven experience in FPGA or ASIC design and verification RTL coding in Verilog or SystemVerilog Familiarity with Vivado or Quartus and timing closure Understanding of system-level design and high-speed ...

complex ideas Preferred Qualifications: Experience with networking protocols and packet processing. Familiarity of pluggable optical transceiver MSA/CMIS specifications Knowledge of FPGA or ASIC development workflows. Familiarity with Linux kernel and device drivers. Exposure to CI/CD pipelines for embedded development. #J-18808-Ljbffr ...

speed data acquisition pipelines utilising ultra-fast ADCs, PCIe, high-speed Ethernet and transceiver technologies Work closely with hardware engineers, software developers, researchers and ASIC architects to define system architecture and technical solutions Develop robust verification environments, perform hardware bring-up activities and optimise timing, power and resource utilisation across ...

speed data acquisition pipelines utilising ultra-fast ADCs, PCIe, high-speed Ethernet and transceiver technologies Work closely with hardware engineers, software developers, researchers and ASIC architects to define system architecture and technical solutions Develop robust verification environments, perform hardware bring-up activities and optimise timing, power and resource utilisation across ...

teams and programming languages to find root causes of deep and complex issues Experience of the verification process applied in CPU and/or ASIC environments System Verilog, Python, C++, Linux Desirable UVM SVA Assembly languages LLVM, GCC DVCS e.g. Git SGE or other DRMS XML and XPath/XSLT ...

Overview Swedium Global Services is a growing System Engineering and Solution Company, offering services like Semiconductor Engineering R&D Services, Embedded Systems Development, Custom Application Software Development, Web and Cloud Application Development, Testing ...

/SystemVerilogDeveloping high-speed modules (PCIe, Ethernet, DDR/QDR) with deep pipeliningUsing simulation and formal tools (Verilator, Cocotb, etc.) for validationWorking across teams (ASIC, software, infra) to co-design tightly coupled platformsContributing to tooling, flow, and potentially DSL extensionsWhat We’re Looking ForStrong RTL skills with experience building complex ...

Oriole Networks is seeking an experienced Verification Engineer to design and implement high-performance verification for FPGA/ASIC interfaces at 100Gbps+ speeds. You will build testbenches, develop tests, and drive coverage closure across module and system levels. You will collaborate closely with RTL and hardware teams, applying advanced verification ...

Strong HDL, lab debug, and FPGA toolchain experience are essential. This role offers collaboration with academia and industry, tackling real-world probabilistic computing and ASIC-tapeout preparation. #J-18808-Ljbffr ...

Strong electronic hardware verification experience within aerospace In-depth experience working to DO-254 Experience leading end-to-end verification of electronic hardware, FPGA, ASIC and/or PLD-based systems Development and ownership of verification plans, strategies and compliance matrices Requirements-based hardware verification and traceability Experience defining verification ...

real AI workloads. You'll work across the boundary between hardware and software, owning the runtime, SDK and APIs that interface with FPGA/ASIC hardware while focusing heavily on performance, developer experience and hardware/software co-design. For this Systems Software Engineer role, we are looking for someone ...

team where your ideas directly influence cutting-edge digital hardware solutions and where you’ll gain hands-on experience across the complete FPGA and ASIC development lifecycle. This is an excellent opportunity for engineers looking to accelerate their technical growth, work on challenging projects, and collaborate with experienced industry professionals ...

review technical documentation, including specifications, schematics, and hardware test plans. Perform functional simulation, synthesis and static timing analysis targeting FPGA and/or ASIC technologies. Collaborate with firmware, software, and systems engineers to ensure successful hardware/software integration. Support hardware verification, validation, laboratory bring-up and board-level debugging. ...

role Full Chip Physical Design (PD) Expert is responsible for handling the entire physical implementation process of a complex System-on-Chip (SoC) or ASIC, from initial design handoff (RTL or netlist) to final sign-off for manufacturing (GDSII). This role demands deep expertise across all aspects ...