26 to 49 of 49 ASIC Jobs in the South East

high-throughput computer host architectures via PCIe and high-speed Ethernet. System architecture: Work closely with hardware and software engineers, the research team, and ASIC architects to develop the high-level system architecture. Verification & bring-up: Develop rigorous testbenches and simulations to ensure compliance with functional and timing requirements. Participate … approach. Demonstrated experience with implementing stochastic problems, optimisation algorithms, neural network, or artificial intelligence/machine learning algorithms into hardware. Direct experience with the ASIC design flow: act as the critical bridge towards custom silicon by prototyping, emulating, and validating our probabilistic computing architectures on FPGA platforms prior to ASIC ...

team, working on advanced signal processing solutions for satellite-based communication systems. This role offers the opportunity to work on cutting-edge FPGA and ASIC developments, transforming complex communications algorithms into high-performance hardware. You'll collaborate closely with systems architects, algorithm engineers, and verification teams, contributing throughout the full … looking for a Senior FPGA Engineer with the following background: Strong RTL development using Verilog or SystemVerilog Experience developing FPGA and/or ASIC designs Knowledge of timing closure, synthesis, and hardware optimisation Experience with FPGA verification and simulation methodologies Familiarity with AMD/Xilinx FPGA toolchains Strong communication skills ...

hands-on engineering with team leadership, you'll help define the technical roadmap for high-performance Layer 1 IP while ensuring complex FPGA and ASIC projects are delivered successfully. You'll work closely with algorithm, system architecture, software, and senior leadership teams, translating product requirements into practical hardware solutions. Beyond … following background: Proven experience leading and developing FPGA/digital design teams Expert RTL design using Verilog or SystemVerilog Strong FPGA and/or ASIC development experience Experience with DSP or high-throughput signal processing architectures Strong understanding of synthesis, timing analysis, and hardware optimisation Experience delivering complex IP across ...

proven methodology that combines RTL design with high-speed microcode engines—delivering flexibility to meet new requirements while minimising the risk of re-spins.The ASIC team is involved in every stage of the development flow—from requirements capture and architecture through to development, verification, tape-out, and post-silicon support. … ideal location for both professionals and families.Essential qualifications and skillsBachelor’s or Master’s degree in Electronic Engineering (or related field)Experience in digital ASIC design and verification, including:Defining functional requirements for verification environments & metricsSystemVerilog UVM testbenchesFormal proof verificationUnderstanding of C test cases and C codeScripting languages (e.g. Python ...

Great opportunity for an experienced ASIC Architect to join an innovative next-generation computing company and taking ownership of the architecture and development of a cutting-edge probabilistic computing processor. This is a highly influential role where you will lead ASIC architecture from algorithm and ISA definition through to tape … silicon bring-up. Key Responsibilities for the ASIC Architect role based in Oxford: Own the end-to-end ASIC architecture of a probabilistic computing processor, from algorithm understanding through to tape-out. Define system architecture, instruction set architecture (ISA) and dataflow models based on workload requirements. Perform HW/ ...

space, helping deliver truly global connectivity through advanced satellite-based infrastructure. This is an opportunity to work on complex, high-performance digital hardware, developing ASIC and FPGA solutions that will be deployed in some of the most demanding environments imaginable. Working as part of a multidisciplinary engineering team … specification through implementation and validation. Responsibilities Translate system and algorithm requirements into efficient RTL micro-architectures Design and implement complex digital logic targeting both ASIC and FPGA platforms Develop simulation environments and testbenches to verify functionality Deploy designs onto FPGA development platforms for validation and system integration Optimise designs ...

This role is based at our Milton Park (Abingdon) office, expectation is 4 days per week in the office/lab. Applicants must have the right to live and work in the UK. As part ...

SystemVerilog/UVM environments, creating coverage models and debugging issues across both RTL and verification environments. You'll likely bring SystemVerilog and UVM experience ASIC and/or FPGA verification experience Coverage-driven and assertion-based verification Linux and scripting skills (Python, Tcl or Bash) Strong debugging and problem-solving … scaling it. You'll join at a point where verification is becoming increasingly important as communications IP moves from FPGA-based implementations towards ASIC deployment, working within a team where verification engineers have visibility, influence and direct access to the architects and designers developing the technology. #J-18808-Ljbffr ...

This ASIC Project Manager role offers the opportunity to lead the development of advanced silicon that powers a wide range of next-generation technologies. Rather than working on a single product line, you'll manage multiple ASIC programmes across sectors including automotive, sensing, quantum, industrial and FPGA-based systems, giving … ideal opportunity for someone who enjoys variety and wants to remain close to the engineering while leading complex chip development programmes. As the ASIC Project Manager, you'll take ownership of multiple ASIC developments from early specification through to tape-out and production release, working alongside multidisciplinary engineering teams ...

term CAD strategy in collaboration with senior engineering leadership. Minimum Qualifications: Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation … integration, or related work experience. PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. Key Responsibilities Acts as a senior technical leader and key contributor in a complex, fast‐paced IC design environment. Responsible for the delivery and continuous ...

Unknown in Oxford is seeking an experienced ASIC Architect to own the end-to-end architecture of a probabilistic computing processor, guiding from algorithm and ISA definition through tape-out and silicon bring-up. You will define system architecture and dataflow models, perform HW/SW co-design, and build ...

Architect to lead the architecture and development of next‐generation optical interconnect solution. The ideal candidate combines deep expertise in high-speed SerDes and ASIC architectures with a strong understanding of optical communications, photonics, and advanced packaging. You will work at the intersection of electrical and optical systems, defining architectures … that enable higher bandwidth, lower power consumption, and greater interconnect density. This is a highly cross‐functional role spanning ASIC/SoC architecture, SerDes, optical engines, photonics, packaging, signal integrity, and system‐level interconnects. Key Responsibilities Define system and link architectures for next‐generation optical interconnects. Develop the electrical/ ...

Architect to lead the architecture and development of next-generation optical interconnect solution. The ideal candidate combines deep expertise in high-speed SerDes and ASIC architectures with a strong understanding of optical communications, photonics, and advanced packaging. You will work at the intersection of electrical and optical systems, defining architectures … that enable higher bandwidth, lower power consumption, and greater interconnect density. This is a highly cross-functional role spanning ASIC/SoC architecture, SerDes, optical engines, photonics, packaging, signal integrity, and system-level interconnects. Key Responsibilities Define system and link architectures for next-generation optical interconnects. Develop the electrical/ ...

Great opportunity for an experienced ASIC Architect to join an innovative next-generation computing company and taking ownership of the architecture and development of a cutting-edge probabilistic computing processor. This is a highly influential role where you will lead ASIC architecture from algorithm and ISA definition through to tape ...

long-term CAD strategy in collaboration with senior engineering leadership.Minimum Qualifications:• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.ORMaster's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration … related work experience.ORPhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.Key ResponsibilitiesActs as a senior technical leader and key contributor in a complex, fast-paced IC design environment.Responsible for the delivery and continuous improvement of robust, scalable CAD flows ...

AccelerComm Ltd in Southampton, UK, is seeking a Senior Design Engineer to join the Hardware department. You will develop RTL designs for ASIC/FPGA, contributing to space-qualified, high-throughput baseband processing for next-gen communications. You will collaborate with Algorithm and System Architecture teams, implement testbenches, and optimize ...

leadership, customer engagement and product delivery. You'll help shape technical direction, support key customer discussions and lead a team delivering complex FPGA and ASIC technology, whilst remaining closely involved in the engineering decisions that underpin the product. The Opportunity Lead and develop a team delivering complex FPGA and ASIC … ideas into products. What We're Looking For A proven track record leading teams delivering complex digital hardware products. Strong FPGA and/or ASIC design expertise coupled with system-level architectural thinking. The ability to balance technical leadership, project delivery and people development. An engineer who enjoys mentoring others ...

leadership, customer engagement and product delivery. You'll help shape technical direction, support key customer discussions and lead a team delivering complex FPGA and ASIC technology, whilst remaining closely involved in the engineering decisions that underpin the product. The Opportunity Lead and develop a team delivering complex FPGA and ASIC … ideas into products. What We're Looking For A proven track record leading teams delivering complex digital hardware products. Strong FPGA and/or ASIC design expertise coupled with system-level architectural thinking. The ability to balance technical leadership, project delivery and people development. An engineer who enjoys mentoring others ...

leadership, customer engagement and product delivery. You'll help shape technical direction, support key customer discussions and lead a team delivering complex FPGA and ASIC technology, whilst remaining closely involved in the engineering decisions that underpin the product. The Opportunity Lead and develop a team delivering complex FPGA and ASIC … ideas into products. What We're Looking For A proven track record leading teams delivering complex digital hardware products. Strong FPGA and/or ASIC design expertise coupled with system-level architectural thinking. The ability to balance technical leadership, project delivery and people development. An engineer who enjoys mentoring others ...

working with a leading semiconductor company in the UK seeking an experienced ASIC Project Manager to support delivery of complex ASIC development programmes. This role involves coordinating cross-functional engineering teams, customers, and stakeholders to ensure successful delivery against key technical and commercial milestones across the full ASIC product lifecycle. … responsible for driving execution, managing schedules, and ensuring alignment across engineering and programme objectives in a fast-paced semiconductor environment. Key responsibilities: Manage ASIC development projects across the full product lifecycle Coordinate multidisciplinary engineering teams and external partners Develop and maintain project schedules, budgets, and resource plans Track risks, issues ...

Oxford is seeking an experienced professional to lead the miniaturisation of a groundbreaking computing platform. This role focuses on defining and executing the ASIC strategy while managing integration with various processing units. Candidates should possess a strong understanding of system architecture and proven experience in managing ASIC projects from concept ...

design verification background (digital or mixed-signal) Experience leading small teams or projects Skills in SystemVerilog, UVM, assertions, coverage Exposure to mixed-signal/ASIC environments (RNM a bonus) Why join Work on globally deployed technology Clear path into technical leadership Relocation support available High-impact role in a growing ...

keen to speak with experienced Verification Engineers through to Senior and Principal-level candidates. The opportunity You’ll work across the full ASIC/SoC verification lifecycle, with real ownership of the verification of complex digital subsystems and mixed-signal ICs. Your work will include: Developing SystemVerilog/UVM verification … design and architecture teams Technical leadership and mentoring opportunities at senior levels What they're looking for You'll ideally have a background in ASIC, SoC or Digital IC Verification, with strong experience in: SystemVerilog | UVM | SVA | Constrained Random Verification | Functional Coverage | RTL Debug Experience with mixed-signal verification, formal ...

function, in a cutting-edge Quantum computing environment. The System/SOC HW Architect role is for someone with significant years of experience in ASIC/SOC hardware architecture engineering - potentially from an R&D function, and with a proven track record of multiple tape-outs. You will …/advanced processes/advance nm technology nodes is required - you will be working on a complex SOC that blends new technology with traditional ASIC/SOC Silicon processes. PICs, photonics, GaN, SiGe, FinFET, FD-SOI etc 2.5 - 3D packaging, SiP, complex chiplets and partitioning Quantum experience is NOT required ...