15 of 15 SystemVerilog Jobs in the Thames Valley

FPGA-based signal processing techniques including DDC/DUC, DDS, and FIR/IIR filters, as well as strong experience in FPGA verification and SystemVerilog development. We’re looking for someone fluent in modelling and simulation using Python and/or MATLAB/Simulink, with practical experience in code coverage ...

Collaborate with multidisciplinary teams to deliver next-generation quantum technologies. What We’re Looking For: Strong experience in FPGA programming (VHDL/Verilog/SystemVerilog) and DSP implementation. Knowledge of digital and RF hardware, with hands-on experience in embedded systems. Experience with standard hardware interfaces (I2C, SPI, UART ...

looking for a Staff FPGA Engineer with the following background: 10+ years of hands-on FPGA development experience Strong RTL design and verification using SystemVerilog, Verilog, or VHDL Extensive FPGA-based DSP experience, including DDC/DUC, DDS and FIR/IIR filtering Experience with Xilinx UltraScale+ MPSoC platforms Modelling ...

Buckinghamshire: - Experience working with in a DO-254 environment - Experience working with Lattice Diamond FPGAs - Experience working with more than one language - VHDL, Verilog, SystemVerilog The successful Candidate must currently hold or be able to obtain SC Clearance. For more information or to apply for the Contract FPGA Engineer opportunity ...

up. Essential Experience & skills: 5+ years of industry experience developing FPGA-based DSP or communications systems; strong FPGA design experience using VHDL, Verilog, or SystemVerilog; strong understanding of fixed-point arithmetic, quantisation effects, numerical precision, and hardware implementation trade-offs; experience implementing high-performance parallelised DSP algorithms on FPGA platforms ...

development of signal processing and control functions across RTL design, verification, modeling, hardware testing and debugging. The role requires 10+ years FPGA experience, strong SystemVerilog/Verilog/VHDL RTL skills, DSP expertise (DDC/DUC, DDS, FIR/IIR), Xilinx MPSoC familiarity, and hands-on debugging with lab equipment. ...

Engineering role (ideally) High speed digital Background in FPGA Design and Verification, ideally within Space or another high-reliability sector Experience with VHDL and SystemVerilog Knowledge of high-reliability design and analysis is desirable If you have the required skills for this FPGA Engineer position or would like to learn ...

most advanced quantum systems. You will design, verify, and test FPGA-based signal processing and control modules, with strong emphasis on Verilog/VHDL, SystemVerilog and high-performance embedded solutions, in a collaborative, fast-moving team environment. #J-18808-Ljbffr ...

will lead the design and verification of FPGA test benches and contribute to robust control systems for quantum hardware. You will own verification environments (SystemVerilog/UVM), drive constrained‐random testing and coverage, and help shape automated regression and CI pipelines. Hybrid work and competitive compensation are offered. #J ...

Mixed-Signal Verification, with demonstrated success delivering complex mixed-signal ICs right-first-time Experience in modelling analog subsystems using VerilogA/AMS/SystemVerilog Scripting experience with Python, sh/csh, TCL, Make A great team spirit, and excellent communication skills in English On offer is a competitive basic ...

Location: Bristol, United KingdomThales is a global technology leader with more than 83,000 employees on five continents. With over 7,500 people in the UK, operating across defence, space, aerospace, and digital security, we ...

About Analog DevicesAnalog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions ...

develop critical simulation infrastructure, contributing directly to the success of the FPGA team. Key responsibilities include: Architect, develop, and maintain advanced UVM/SystemVerilog verification environments for complex FPGA designs. Define and execute comprehensive verification plans, including constrained-random testing, functional coverage, and code coverage analysis. Collaborate with RTL design … robust verification strategies, and work collaboratively across design teams to ensure high-quality outcomes. You'd be a great fit with: Strong proficiency in SystemVerilog and UVM for architecting advanced verification environments. Experience using Python for test automation and scripting. Demonstrated ability to lead requirements gathering and define verification plans ...

develop critical simulation infrastructure, contributing directly to the success of the FPGA team. Key responsibilities include Architect, develop, and maintain advanced UVM/SystemVerilog verification environments for complex FPGA designs. Define and execute comprehensive verification plans, including constrained‐random testing, functional coverage, and code coverage analysis. Collaborate with RTL design … robust verification strategies, and work collaboratively across design teams to ensure high‐quality outcomes. You'd be a great fit with Strong proficiency in SystemVerilog and UVM for architecting advanced verification environments. Experience using Python for test automation and scripting. Demonstrated ability to lead requirements gathering and define verification plans ...

chip that the whole team simulates against, a mixed‐abstraction model combining transistor‐level circuits with Verilog‐A/Verilog‐AMS and SystemVerilog real‐number behavioural blocks. You will decide which blocks are represented at which level of abstraction, keep the models faithful to the schematics and measured silicon. … chip that the whole team simulates against, a mixed‐abstraction model combining transistor‐level circuits with Verilog‐A/Verilog‐AMS and SystemVerilog real‐number behavioural blocks. These models will be derived from first‐principles mathematics and correlated against schematic and measured silicon. You will decide which blocks are represented ...