1 to 25 of 321 ASIC Jobs in the UK

s Solution Engineering FPGA Design team on a permanent basis. The team is based in Cambridge UK, working at the forefront of Arm based embedded design. The team delivers ASIC prototypes on FPGA platforms, internally and externally, in support Arm's IP business model, based around Arm's leading CPU and system IP solutions. These platforms are used for software … partners/customers. The role will involve building an understanding of incoming Arm IP RTL designs and making the relevant design changes to implement an FPGA prototype of this ASIC RTL, on FPGA. You'll be part of a project team responsible for delivery of the prototype, creating FPGA prototypes for enablement and validation, working collaboratively with other teams in … and structured approach to problem-solving with excellent communications skills, written and spoken English; ability to write coherent documentation. "Nice To Have" Skills and Experience: Demonstrate an understanding of ASIC/SoC prototyping in FPGA. Working with the latest Xilinx UltraScale+ devices and tools. Knowledge/Experience of implementation of FPGA peripherals such as DDR memory, PCIe and high speed More ❯

development flow, and where technical ownership is both expected and supported. What they’re looking for: Proven expertise in RTL design using Verilog or SystemVerilog for complex FPGA or ASIC systems Strong grasp of synthesis, timing closure, and resource optimisation for high-speed signal processing applications Experience developing and integrating IP in multi-block hardware systems Familiarity with UVM verification … Knowledge of communications signal processing algorithms (e.g. error correction, equalisation, beamforming) Experience with AMBA protocols, Python scripting, or C SystemC modelling Exposure to AMD/Xilinx FPGA toolchains or ASIC backend flows Understanding of project lifecycles including agile or V-model methodologies Why consider this opportunity? Work on industry-defining technology at the intersection of 5G and space Join a More ❯

development flow, and where technical ownership is both expected and supported. What they’re looking for: Proven expertise in RTL design using Verilog or SystemVerilog for complex FPGA or ASIC systems Strong grasp of synthesis, timing closure, and resource optimisation for high-speed signal processing applications Experience developing and integrating IP in multi-block hardware systems Familiarity with UVM verification … Knowledge of communications signal processing algorithms (e.g. error correction, equalisation, beamforming) Experience with AMBA protocols, Python scripting, or C SystemC modelling Exposure to AMD/Xilinx FPGA toolchains or ASIC backend flows Understanding of project lifecycles including agile or V-model methodologies Why consider this opportunity? Work on industry-defining technology at the intersection of 5G and space Join a More ❯

with colleagues in the verification teams, modelling teams, software driver developers, multimedia architects and imaging researchers. Mentor & support other members of the team Required skills and experience: Experience in ASIC RTL design, ideally for Multimedia IP (ISPs, DPUs, VPUs) or related IP (CPU, GPU, interconnect, memory controllers, high-performance peripherals). Proficiency in System Verilog, Verilog or VHDL. Exposure to More ❯

ASIC Design Engineer Edinburgh I am seeking a highly skilled Digital Design Engineer with strong DSP (Digital Signal Processing) experience to join a growing team. In this role, you will be responsible for architecting and implementing power-efficient RTL designs for custom DSP blocks, contributing to the development of high-performance, low-power digital hardware for advanced communication systems and … Deep understanding of power-efficient digital design techniques . Experience in custom hardware development for DSP applications . Familiarity with fixed-point and floating-point arithmetic implementations. Experience with ASIC or FPGA design flows , including synthesis and timing closure. Understanding of communication systems and protocols is a strong advantage. Competency in scripting languages such as Python, Perl , or Tcl for More ❯

and methodologies. Hands-on experience in RTL design at IP or SoC level. Proficiency in optimizing circuit designs and balancing key trade-offs for performance metrics. Expertise in ASIC or FPGA design tools and environments. Familiarity with writing assertions and creating coverage bins for verification. Strong analytical skills, responsibility, and problem-solving capabilities. You might also have: Understanding of …/CPU design and associated tools such as UVM or formal verification methodologies. Knowledge of CPU, DSP, or FPU architectures and debugging/testing strategies. Hands-on experience with ASIC, FPGA, and physical design tools (P&R). Proficiency in SystemVerilog, C, SystemC, C++, Python, Perl, or TCL. Knowledge of place and route methodologies. Strong communication skills, both written and More ❯

and methodologies. Hands-on experience in RTL design at IP or SoC level. Proficiency in optimizing circuit designs and balancing key trade-offs for performance metrics. Expertise in ASIC or FPGA design tools and environments. Familiarity with writing assertions and creating coverage bins for verification. Strong analytical skills, responsibility, and problem-solving capabilities. You might also have: Understanding of …/CPU design and associated tools such as UVM or formal verification methodologies. Knowledge of CPU, DSP, or FPU architectures and debugging/testing strategies. Hands-on experience with ASIC, FPGA, and physical design tools (P&R). Proficiency in SystemVerilog, C, SystemC, C++, Python, Perl, or TCL. Knowledge of place and route methodologies. Strong communication skills, both written and More ❯

and methodologies. Hands-on experience in RTL design at IP or SoC level. Proficiency in optimizing circuit designs and balancing key trade-offs for performance metrics. Expertise in ASIC or FPGA design tools and environments. Familiarity with writing assertions and creating coverage bins for verification. Strong analytical skills, responsibility, and problem-solving capabilities. You might also have: Understanding of …/CPU design and associated tools such as UVM or formal verification methodologies. Knowledge of CPU, DSP, or FPU architectures and debugging/testing strategies. Hands-on experience with ASIC, FPGA, and physical design tools (P&R). Proficiency in SystemVerilog, C, SystemC, C++, Python, Perl, or TCL. Knowledge of place and route methodologies. Strong communication skills, both written and More ❯

You will also identify areas for improvement in processes and methodologies, then implement those changes to advance our best-practises for hardware design. Required Skills and Experience : Experience of ASIC RTL design, preferably for ISP, processor design (CPU or GPU) or related IP (interconnect, memory controllers, high-performance peripherals) Experience of Verilog, System Verilog or VHDL Exposure to all stages More ❯

You will also identify areas for improvement in processes and methodologies, then implement those changes to advance our best-practises for hardware design. Required Skills and Experience : Experience of ASIC RTL design, preferably for ISP, processor design (CPU or GPU) or related IP (interconnect, memory controllers, high-performance peripherals) Experience of Verilog, System Verilog or VHDL Exposure to all stages More ❯

You will also identify areas for improvement in processes and methodologies, then implement those changes to advance our best-practises for hardware design. Required Skills And Experience Experience of ASIC RTL design, preferably for ISP, processor design (CPU or GPU) or related IP (interconnect, memory controllers, high-performance peripherals) Experience of Verilog, System Verilog or VHDL Exposure to all stages More ❯

Company Overview Flux Computing designs and manufactures optical processors to train and run inference on large AI models. Join us in London to be part of a highly motivated and skilled team that thrives on delivering impact and innovation at More ❯

Envisics Milton Keynes, England, United Kingdom Join or sign in to find your next job Join to apply for the Senior ASIC Design Engineer role at Envisics Envisics Milton Keynes, England, United Kingdom 12 hours ago Be among the first 25 applicants Join to apply for the Senior ASIC Design Engineer role at Envisics Get AI-powered advice on this … Recruitment/Talent Acquisition Leader who gets things done on time, on budget, and with high levels of quality. Also trains and runs Ultra... Join Us as a Senior ASIC Design Engineer at Envisics! Location: Milton Keynes, England, United Kingdom (Hybrid) Are you ready to revolutionize the automotive industry? At Envisics , we are leading the charge in holographic display technologies … and Media, Computers and Electronics Manufacturing, and Appliances, Electrical, and Electronics Manufacturing Referrals increase your chances of interviewing at Envisics by 2x Get notified about new Application Specific Integrated Circuit Design Engineer jobs in Milton Keynes, England, United Kingdom . We’re unlocking community knowledge in a new way. Experts add insights directly into each article More ❯

reduce power. Documentation including micro architecture and programming guides. Ownership of complete work package from specification through to delivery. Cross functional collaboration with Firmware, Systems and Verification teams. Running ASIC development tools including Lint, CDC, Synthesis, Power analysis tools. Planning, reporting status and communicating progress against expectations. Required Competencies Effective communicator with strong technical presentation skills. RTL design in System … Design Engineer/Hardware Lead Cambridge, England, United Kingdom 6 days ago Senior Analogue and Digital Electronic Design Engineer Cambourne, England, United Kingdom 1 week ago Application Specific Integrated Circuit Design Engineer Cambridge, England, United Kingdom 1 week ago Application Specific Integrated Circuit Design Engineer Cambridgeshire, England, United Kingdom 2 weeks ago More ❯

and methodologies. Hands-on experience in RTL design at IP or SoC level. Proficiency in optimizing circuit designs and balancing key trade-offs for performance metrics. Expertise in ASIC or FPGA design tools and environments. Familiarity with writing assertions and creating coverage bins for verification. Strong analytical skills, responsibility, and problem-solving capabilities. You might also have: Understanding of …/CPU design and associated tools such as UVM or formal verification methodologies. Knowledge of CPU, DSP, or FPU architectures and debugging/testing strategies. Hands-on experience with ASIC, FPGA, and physical design tools (P&R). Proficiency in SystemVerilog, C, SystemC, C++, Python, Perl, or TCL. Knowledge of place and route methodologies. Strong communication skills, both written and More ❯

new ambitious team players to help us advance our place in the Universe and beyond. Responsibilities Working as part of a multi-disciplinary team of engineers developing FPGA/ASIC based satellite telecommunication payloads, instruments, and sensors Responsible throughout the Hardware product development lifecycle for the specification, design and testing SoC IP and Firmware integration Detailed circuit design including More ❯

architecture and RTL design using System Verilog, Verilog, or VHDL within reasonable timescales. Ability to make high-level design trade-offs and articulate the rationale behind decisions. Knowledge of ASIC (or FPGA) design methodology, IP signoff processes, and understanding of timing, area, and complexity trade-offs for complex data path designs. 'Nice To Have' Skills and Experience: Team leadership and More ❯

reduce power. Documentation including micro architecture and programming guides. Ownership of complete work package from specification through to delivery. Cross functional collaboration with Firmware, Systems and Verification teams. Running ASIC development tools including Lint, CDC, Synthesis, Power analysis tools. Planning, reporting status and communicating progress against expectations. Required Competencies Effective communicator with strong technical presentation skills. RTL design in System More ❯

reduce power. Documentation including micro architecture and programming guides. Ownership of complete work package from specification through to delivery. Cross functional collaboration with Firmware, Systems and Verification teams. Running ASIC development tools including Lint, CDC, Synthesis, Power analysis tools. Planning, reporting status and communicating progress against expectations. Required Competencies Effective communicator with strong technical presentation skills. RTL design in System More ❯

reduce power. Documentation including micro architecture and programming guides. Ownership of complete work package from specification through to delivery. Cross functional collaboration with Firmware, Systems and Verification teams. Running ASIC development tools including Lint, CDC, Synthesis, Power analysis tools. Planning, reporting status and communicating progress against expectations. Required Competencies Effective communicator with strong technical presentation skills. RTL design in System More ❯

reduce power. Documentation including micro architecture and programming guides. Ownership of complete work package from specification through to delivery. Cross functional collaboration with Firmware, Systems and Verification teams. Running ASIC development tools including Lint, CDC, Synthesis, Power analysis tools. Planning, reporting status and communicating progress against expectations. Required Competencies Effective communicator with strong technical presentation skills. RTL design in System More ❯

micro-architecture and RTL design using SystemVerilog, Verilog, or VHDL within reasonable timescales. Ability to navigate high-level design trade-offs and articulate the rationale behind decisions. Knowledge of ASIC (or FPGA) design methodology, IP signoff methods, and understanding of timing, area, and complexity trade-offs for complex data path designs. 'Nice To Have' Skills and Experience: Team leadership and More ❯

complex verification environments using different methodologies, such as UVM and SV Who are we looking for? We are looking for an engineer with extensive experience of large FPGA and ASIC design to join our Software Engineering function. The ideal candidate will have the following skills and experience: Knowledge of industry-standard interfaces, such as Avalon and AXI Experience with industry … standard build tools, including version control Knowledge of QuestaSim environment Must have extensive experience with large FPGA/ASIC designs A background in fintech would also be beneficial Why should you apply? Highly competitive compensation plus annual discretionary bonus Lunch provided (via Just Eat for Business) and dedicated barista bar 35 days’ annual leave 9% company pension contributions Informal dress … Engineer Basildon, England, United Kingdom 4 days ago Associate Applications Engineer IC (w/m/d) - Graduate Program London, England, United Kingdom 5 days ago Application Specific Integrated Circuit Design Engineer London, England, United Kingdom 1 day ago Graduate- Senior-Principal Electrical Hardware Engineer Chelmsford, England, United Kingdom 2 weeks ago London, England, United Kingdom More ❯

Senior Hardware Design Engineer, you will: - Work closely with the Algorithm team to understand requirements and translate them into architectures for RTL implementations Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of UVM based testbenches Deploy your designs onto the latest FPGA development platforms for validation and system integration Actively engage with and adhere … efficiency and quality for both the design flow and the final product Collaborate with colleagues across the whole design flow: micro-architecture, design, verification, physical implementation and optimisation for ASIC and FPGA Skills, Knowledge and Expertise Essential: Expert knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivering digital designs in the … ASIC and FPGA industry Optimisation of timing and hardware resources for high throughput data or signal processing applications. Experience in power management techniques, synthesis and timing analysis Track record in collaborating across teams to produce integrated solutions Experience in technical documentation writing - design specifications, user guides, verification plans Expert user of EDA tools for simulation and synthesis Desirable: Knowledge More ❯

Senior Hardware Design Engineer, you will: - Work closely with the Algorithm team to understand requirements and translate them into architectures for RTL implementations Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of UVM based testbenches Deploy your designs onto the latest FPGA development platforms for validation and system integration Actively engage with and adhere … efficiency and quality for both the design flow and the final product Collaborate with colleagues across the whole design flow: micro-architecture, design, verification, physical implementation and optimisation for ASIC and FPGA Skills, Knowledge and Expertise Essential: Expert knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivering digital designs in the … ASIC and FPGA industry Optimisation of timing and hardware resources for high throughput data or signal processing applications. Experience in power management techniques, synthesis and timing analysis Track record in collaborating across teams to produce integrated solutions Experience in technical documentation writing - design specifications, user guides, verification plans Expert user of EDA tools for simulation and synthesis Desirable: Knowledge More ❯