1 to 25 of 29 Tcl Jobs in the UK

specialists. Experience in the following areas is beneficial: VHDL for FPGA development (essential for mid-level/senior, foundational understanding for junior applicants). TCL scripting and ModelSim/Questasim. Familiarity with current FPGA and SoC technologies, ideally including Quartus. A degree or postgraduate qualification in a relevant STEM subject. ...

build scripts, Jenkins CI/CD and automated test frameworks. Understanding of ARM Cortex-M architecture. Familiarity with Linux, Git and scripting languages (Bash, Tcl). PCB debug/test experience and general bench test skills. Exposure to Agile development practices. This is a great opportunity to join a very ...

build scripts, Jenkins CI/CD and automated test frameworks. Understanding of ARM Cortex-M architecture. Familiarity with Linux, Git and scripting languages (Bash, Tcl). PCB debug/test experience and general bench test skills. Exposure to Agile development practices. This is a great opportunity to join a very ...

implementation experience (eg, SAP S/4HANA). Bonus knowledge: web app development, cloud/SaaS, scripting/programming (C#, Python, SQL, PowerShell, XML, Tcl/Tk). MUST: you must be eligible for security clearance and be able to work in Godalming 4 days a week on site ...

languages, in particularly writing and debugging Linux/Unix bash scripts is an advantage. Knowledge of a programming language such as C, Java, python, TCL ...

closure D. AMD Toolchain Experience Hands-on experience with AMD Vivado/Vitis tools and associated flows E. Scripting & Automation Proficiency in scripting: Python, Tcl Able to automate design, build, and verification workflows Comfortable with Git for CI/CD integration Deliverables RTL IP blocks developed in SystemVerilog according ...

Translating design requirements into RTL Deriving functional requirements for verification Systemverilog UVM test benches Scripting languages & REST API's (e.g. Perl/Python/TCL) Team player with good verbal and written communication skills Formal Verification Desirable skills: Experience using SV UVM 1800.2 Familiarity with C/C++ Experience with ...

Translating design requirements into RTL Deriving functional requirements for verification Systemverilog UVM test benches Scripting languages & REST API's (e.g. Perl/Python/TCL) Team player with good verbal and written communication skills Formal Verification Desirable skills: Experience using SV UVM 1800.2 Familiarity with C/C++ Experience with ...

Translating design requirements into RTL Deriving functional requirements for verification Systemverilog UVM test benches Scripting languages & REST API’s (e.g. Perl/Python/TCL) Team player with good verbal and written communication skills Formal Verification Desirable skills: Experience using SV UVM 1800.2 Familiarity with C/C++ Experience with ...

detail.Ability to work effectively within multidisciplinary teams and liaise directly with clients.Desirable:Familiarity with version control systems (e.g., Git, SVN).Scripting experience in TCL or Python for tool automation.Additional Information: Due to the sensitive nature of the work, successful candidates must be eligible for UK Security Clearance. Pre-employment screening ...

work effectively within multidisciplinary teams and liaise directly with clients. Desirable: Familiarity with version control systems (e.g., Git, SVN). Scripting experience in TCL or Python for tool automation. Additional Information: Due to the sensitive nature of the work, successful candidates must be eligible for UK Security Clearance. Pre-employment ...

discipline.5+ years experience of working within the semiconductor industry.Proven experience in the Verification of complex designs - FPGA or ASIC.Good scripting skills (Python, Perl or TCL for automation).Working with RTL designers to develop a formal micro-architecture specification.In-depth understanding of Formal Verification techniques.Strong knowledge on Metrics-driven verification including ...

automation Good understanding of ARM Cortex-M series processors and CPU architecture Some PCB electronics design experiences Familiarity with Linux, Git, Bash, and Tcl Compensation: Private health insurance Life insurance 33 days holiday Expert training from renowned industry veterans Apply now to join a company truly leading their niche ...

/Adaptive SoC design flow, including place & route (P&R) and timing closure Proficiency in Vivado/Vitis Strong scripting skills in Python and Tcl Experience with Git and CI/CD Additional Information: Remote role: No regular office attendance required. ...

verification frameworks like UVM/OVM, e, VMM Debugging skills – RTL – Testbench, OOP – Gate level (including SDF) Scripting experience with Ruby, sh/csh, TCL, Make, Perl Power aware verification (using CPF/UPF) This position is based in Edinburgh. This is a hybrid remote position and will follow ...

verification frameworks like UVM/OVM, e, VMM Debugging skills – RTL – Testbench, OOP – Gate level (including SDF) Scripting experience with Ruby, sh/csh, TCL, Make, Perl Power aware verification (using CPF/UPF) This position is based in Edinburgh. This is a hybrid remote position and will follow ...

understanding of low-power and high-speed design techniques. Knowledge of signal-processing concepts (a plus). Familiarity with scripting/automation tools (Python, Tcl) for design flows. Solid understanding of clock-domain crossing concepts and mitigation strategies. Experience reviewing synthesis and static-timing-analysis results. Knowledge of verification methodologies ...

globally. Key skills and experience should include: Bachelors/Masters Degree in Electronic/Computer/Electrical Engineering. Programming skills in Python, Shell, Perl, Tcl or similar. Deep understanding of the chip design process. Proficiency building robust EDA/CAD flows. Experience with Cadence Voltus (or similar). Extensive experience ...

systems globally. Key skills and experience should include:Bachelors/Masters Degree in Electronic/Computer/Electrical Engineering.Programming skills in Python, Shell, Perl, Tcl or similar.Deep understanding of the chip design process.Proficiency building robust EDA/CAD flows.Experience with Cadence Voltus (or similar).Extensive experience across front ...

Proficiency with assertion-based techniques (e.g., SVA, PSL) Experience using formal verification tools (Cadence ecosystem advantageous but not essential) Scripting skills for automation (Python, TCL, Perl or similar) Understanding of digital design, CPU/ISA concepts and common bus or interconnect protocols Clear communicator with a structured, analytical and cooperative ...

physical verification tools (e.g. Synopsys/Cadence). Understanding of constraints, timing signoff methodology and advanced-node challenges. Familiarity with scripting (Python, Perl, Tcl, etc.) to support automation. Experience collaborating with global, multi-disciplinary design teams. Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn ...

physical verification tools (e.g. Synopsys/Cadence). Understanding of constraints, timing signoff methodology and advanced-node challenges. Familiarity with scripting (Python, Perl, Tcl, etc.) to support automation. Experience collaborating with global, multi-disciplinary design teams. Email - jordan.browne@ic-resources.com Tel - 01189073075 LinkedIn - https://www.linkedin.com/in/ ...

physical design teams to debug timing paths, root-cause violations and propose practical solutions. Automate flows and enhance STA-related infrastructure using scripting (TCL/Python/Perl). Evaluate timing approaches, methodologies and tool behaviour across new processes and libraries. Partner with central methodology specialists to influence timing strategy ...

understanding of query executions across databases. Hands-on working experience in executing and debugging SQL queries in live environments. Familiar with DML, DDL, DCL, TCL statements and their appropriate usage. Well-versed in database-related issue handling, including deadlocks, slow query troubleshooting, and monitoring. Cloud Understanding: Awareness of cloud architecture ...

Vivado, Quartus or Libero) and version control (GIT/SVN/CVS). For experienced candidates: proven end-to-end FPGA delivery, interface definition, TCL scripting, and robust verification approaches (e.g., UVM/OSVVM/ABV). Bonus points for: experience with Xilinx/Intel (Altera)/Microchip devices; ModelSim …/Graduate Hardware Engineer/Electronics Engineer/VHDL/Verilog/SystemVerilog/Vivado/Quartus/Libero/ModelSim/QuestaSim/TCL/Xilinx/Intel (Altera)/Microchip (Microsemi)/UVM/OSVVM/Assertion-Based Verification/USB 3.2/NVMe/Layer-2/ ...