metric-driven verification , including verification planning , functional coverage , code coverage , unit-level verification , and top-level verification . Expertise in testbench architecture design and hands-on experience with System Verilog , UVM , ABV , and constrained random verification . Experience with PSL , SVA , e , VMM , OVM . Familiarity with formal verification techniques such as model checking , CDC , and power-aware verification (e.g. More ❯
metric-driven verification , including verification planning , functional coverage , code coverage , unit-level verification , and top-level verification . Expertise in testbench architecture design and hands-on experience with System Verilog , UVM , ABV , and constrained random verification . Experience with PSL , SVA , e , VMM , OVM . Familiarity with formal verification techniques such as model checking , CDC , and power-aware verification (e.g. More ❯
metric-driven verification , including verification planning , functional coverage , code coverage , unit-level verification , and top-level verification . Expertise in testbench architecture design and hands-on experience with System Verilog , UVM , ABV , and constrained random verification . Experience with PSL , SVA , e , VMM , OVM . Familiarity with formal verification techniques such as model checking , CDC , and power-aware verification (e.g. More ❯
metric-driven verification , including verification planning , functional coverage , code coverage , unit-level verification , and top-level verification . Expertise in testbench architecture design and hands-on experience with System Verilog , UVM , ABV , and constrained random verification . Experience with PSL , SVA , e , VMM , OVM . Familiarity with formal verification techniques such as model checking , CDC , and power-aware verification (e.g. More ❯
metric-driven verification , including verification planning , functional coverage , code coverage , unit-level verification , and top-level verification . Expertise in testbench architecture design and hands-on experience with System Verilog , UVM , ABV , and constrained random verification . Experience with PSL , SVA , e , VMM , OVM . Familiarity with formal verification techniques such as model checking , CDC , and power-aware verification (e.g. More ❯
metric-driven verification , including verification planning , functional coverage , code coverage , unit-level verification , and top-level verification . Expertise in testbench architecture design and hands-on experience with System Verilog , UVM , ABV , and constrained random verification . Experience with PSL , SVA , e , VMM , OVM . Familiarity with formal verification techniques such as model checking , CDC , and power-aware verification (e.g. More ❯
metric-driven verification , including verification planning , functional coverage , code coverage , unit-level verification , and top-level verification . Expertise in testbench architecture design and hands-on experience with System Verilog , UVM , ABV , and constrained random verification . Experience with PSL , SVA , e , VMM , OVM . Familiarity with formal verification techniques such as model checking , CDC , and power-aware verification (e.g. More ❯
based firmware development lifecycle to deliver customer requirements by: Developing high-level firmware requirements using DOORS Creating architectural designs Defining low level requirements and detailed designs Writing VHDL and Verilog HDL code using Sigasi Studio Simulating HDL designs at unit, integration and system level using Mentor Graphics QuestaSIM Undertaking synthesis, place and route and static timing analysis using Synopsis Synplify More ❯
intricately involved in creating next generation FPGA solutions to support ultra-low latency trading systems across the firm. The ideal candidate should have a strong background in in System Verilog or VHDL, as well as software engineering. The candidate must have a keen interest in using software engineering methodologies to improve the efficiency of the hardware development workflow, as well … Engineering, Computer Science or similar 5+ years professional experience as an FPGA Developer either in or outside of the finance/trading industry Experienced and well-versed in System Verilog or VHDL (Python, C, Tcl, and bash a plus) Experience in one or more of the following areas: Hardware Architecture, RTL Coding, Simulation, Systems Integration, Hardware Validation and Testing, FPGA More ❯
intricately involved in creating next generation FPGA solutions to support ultra-low latency trading systems across the firm. The ideal candidate should have a strong background in in System Verilog or VHDL, as well as software engineering. The candidate must have a keen interest in using software engineering methodologies to improve the efficiency of the hardware development workflow, as well … Engineering, Computer Science or similar 5+ years professional experience as an FPGA Developer either in or outside of the finance/trading industry Experienced and well-versed in System Verilog or VHDL (Python, C, Tcl, and bash a plus) Experience in one or more of the following areas: Hardware Architecture, RTL Coding, Simulation, Systems Integration, Hardware Validation and Testing, FPGA More ❯
intricately involved in creating next generation FPGA solutions to support ultra-low latency trading systems across the firm. The ideal candidate should have a strong background in in System Verilog or VHDL, as well as software engineering. The candidate must have a keen interest in using software engineering methodologies to improve the efficiency of the hardware development workflow, as well … Engineering, Computer Science or similar 5+ years professional experience as an FPGA Developer either in or outside of the finance/trading industry Experienced and well-versed in System Verilog or VHDL (Python, C, Tcl, and bash a plus) Experience in one or more of the following areas: Hardware Architecture, RTL Coding, Simulation, Systems Integration, Hardware Validation and Testing, FPGA More ❯
london (city of london), south east england, united kingdom
Radley James
intricately involved in creating next generation FPGA solutions to support ultra-low latency trading systems across the firm. The ideal candidate should have a strong background in in System Verilog or VHDL, as well as software engineering. The candidate must have a keen interest in using software engineering methodologies to improve the efficiency of the hardware development workflow, as well … Engineering, Computer Science or similar 5+ years professional experience as an FPGA Developer either in or outside of the finance/trading industry Experienced and well-versed in System Verilog or VHDL (Python, C, Tcl, and bash a plus) Experience in one or more of the following areas: Hardware Architecture, RTL Coding, Simulation, Systems Integration, Hardware Validation and Testing, FPGA More ❯
Southampton, England, United Kingdom Hybrid / WFH Options
Octagon Group
The job: Leading and mentoring a team of FPGA engineers Owning the technical direction for FPGA development across several product lines Designing and developing FPGA solutions using VHDL or Verilog Overseeing verification, validation, and integration of designs Working on high-performance designs, often involving video or RF signal processing The ideal candidate: A degree in Electrical Engineering, Computer Science, or … something similar At least 10 years of hands-on FPGA design experience Comfortable leading others and making technical decisions Solid experience with VHDL or Verilog and common FPGA toolsets A good grasp of high-speed digital design You’ll need to be eligible for UK Security Clearance The offer: Salary up to £75,000 (depending on experience) Hybrid working and More ❯
portsmouth, hampshire, south east england, united kingdom Hybrid / WFH Options
Octagon Group
The job: Leading and mentoring a team of FPGA engineers Owning the technical direction for FPGA development across several product lines Designing and developing FPGA solutions using VHDL or Verilog Overseeing verification, validation, and integration of designs Working on high-performance designs, often involving video or RF signal processing The ideal candidate: A degree in Electrical Engineering, Computer Science, or … something similar At least 10 years of hands-on FPGA design experience Comfortable leading others and making technical decisions Solid experience with VHDL or Verilog and common FPGA toolsets A good grasp of high-speed digital design You’ll need to be eligible for UK Security Clearance The offer: Salary up to £75,000 (depending on experience) Hybrid working and More ❯
equivalent. Experience in using emulation and FPGA prototyping. Embedded software development and HW/SW co-design and verification. Experience with Hardware Design and Verification languages including PSL, SVA, Verilog, VHDL, System Verilog, System-C, TLM. Experience of the IP/SoC verification process. Experience with Unix/Linux environment including scripting languages. Good Communication and presentation skills. Additional Information More ❯
Edinburgh, Scotland, United Kingdom Hybrid / WFH Options
Leonardo SpA
security clearance. It would be desirable if you had: Experience with auto-generated code using model-driven engineering tools like MATLAB and Simulink. Experience with design tools such as Verilog, System Verilog, and UVM. Experience within the defence industry. What we need from you: Personal attributes and values are just as important as technical ability. We seek engineers with a More ❯
Easter Howgate, Midlothian, United Kingdom Hybrid / WFH Options
Leonardo UK Ltd
security clearance. It would be desirable if you had: Experience of auto-generated code using model driven engineering using MATLAB and Simulink tools. Experience of design tools such as Verilog, System Verilog and UVM. Experience within the defence industry. What we need from you: Personal attributes and values are just as important to us as technical ability, so we are More ❯
modern toolsets available. Your day-to-day will involve: Translating customer needs into high-level firmware requirements using DOORS Developing architectural and detailed designs Writing HDL code (VHDL/Verilog) in Sigasi Studio Simulating your work using Mentor Graphics QuestaSIM Performing synthesis, place & route, and STA with Synplify (targeting Xilinx FPGAs) Creating automation scripts in Python Supporting CI/CD More ❯
colleagues across the whole design flow: micro-architecture, design, verification, physical implementation and optimisation for ASIC and FPGA Skills, Knowledge and Expertise Essential: Expert knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products A strong skillset in delivering digital designs in the ASIC and FPGA industry Optimisation of timing and hardware resources for high throughput data More ❯
Engineering (CE), Electrical Engineering (EE), Computer Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working with digital simulators and More ❯
Engineering (CE), Electrical Engineering (EE), Computer Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working with digital simulators and More ❯
london (city of london), south east england, united kingdom
Algo Capital Group
Engineering (CE), Electrical Engineering (EE), Computer Science (CS), or a related technical field. Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs. Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages. Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints. Experience working with digital simulators and More ❯
of digital communication protocols and signal exploitation techniques Candidates must be willing and eligible to go through high level security clearance checks Experience with FPGAs (e.g. RFSoC), VHDL/Verilog Familiarity with Linux, GitLab, and collaborative DevOps environments Prior work in defence, intelligence, or covert communications systems O.K. I'm in what's next? Apply with your latest CV below More ❯
