and use of data formats such as YAML and JSON. Practical embedded software knowledge to test and debug designs. Experienced with the implementation of ASIC/SoC RTL in FPGA Real hands-on expertise in debugging sophisticated designs Solid understanding of AMBA bus standards A creative and structured approach to more »
following skills and qualifications: Master’s degree (Dipl.-Ing.) or PhD in electrical engineering or computer science Minimum 5 years of experience in digital ASIC design for advanced CMOS technology nodes Excellent programming skills in hardware description languages (e.g. SystemVerilog) Excellent knowledge of state-of-the-art SoC design flows more »
is only available for Spanish and English speakers. Qualifications: Bachelor's or Master's Degree in relevant field, with 5+ years' work experience in ASIC digital design/development processes. Excellent RTL coding skills in Verilog Knowledge of standard Digital Verification languages (System Verilog, UVM) and metrics. Very good understanding more »
translating design requirements into RTL description Experience of digital or mixed-signal verification activities, testbench and verification planning, regression tests Consolidated knowledge on complete ASIC design flow (from RTL to GDSII) Good knowledge of existing EDA tools (Cadence or Synopsys Design Framework) Good English knowledge (written and spoken) Nice to more »
the following skills and qualifications: Master’s degree (Dipl.-Ing.) or PhD in electrical engineering or computer science Minimum 5 years of experience in ASIC development Expertise in verification methodologies & tools Strong knowledge of UVM Excellent programming skills in hardware description languages (e.g. SystemVerilog) Good programming skills in scripting languages more »
PhD in Electrical Engineering, Electronics, Computer Science or related subject Minimum of 3 years experience in RTL coding in VHDL, Verilog or System Verilog ASIC implementation including a good understanding of EDA flow FPGA experience is a plus Strong customer facing skills Excellent written, verbal communication and presentation skills. Comfortable more »
over the last 5+ years. Applicants must have experience of CMOS image sensors Bachelor/Masters/PHD in Electronic Engineering or similar field ASIC digital design knowledge of complex tape-out projects Detailed understanding of UVM environments and RTL coding in verilog/system verilog Must have good scripting more »
Working for a global leader in semiconductor products for a variety of complex, high-speed products; including security and high-speed communications IP. Senior ASIC Design Verification Engineer €70-90k plus package (bonus, relocation, RSUs) Visa sponsorship is available for the right candidate/applicant/engineer. Requirements: Degree more »
IC verification engineers! Applicants must have an interest in high computing power and ultra-efficiency, as well as a good understanding of FPGA/ASIC development. You will be working in a unique hardware/software environment, with an emphasis on embedded software and simulation - all for the development of more »
HDL (SystemVerilog/Verilog/VHDL), particularly for testbenches creation Knowledge/experience in scripting languages, such as Tcl and Python Some knowledge of ASIC design flow and related verification step Nice to have: Some experience in digital RTL design Knowledge of UVM environments and classes Some experience with main more »
of System Architect, you will need to have: A Masters/PhD in Electronic Engineering or similar field A solid working background within Digital ASIC/FPGA Design, with knowledge of the complete digital design flow Expertise within Verilog, SystemC, C/C++, or Python A good working knowledge of more »
following skills and qualifications: Master’s degree (Dipl.-Ing.) or PhD in electrical engineering or computer science Minimum 5 years of experience in digital ASIC design Excellent programming skills in hardware description languages (e.g. SystemVerilog) Good programming skills in scripting languages (e.g. Python, Perl, Tcl) Expertise in verification methodologies & tools more »
Swindon, Dudley, West Midlands Hybrid / WFH Options
IC Resources
or github, CI/CD, automated build systems. MISRA/quality-assurance techniques ability read and understand schematics. knowledge of VHDL/Verilog for ASIC/FPGA design.This is a really fabulous role for someone who is looking to take a step up in their career, with opportunity for mentoring more »
Swindon, England, United Kingdom Hybrid / WFH Options
IC Resources
or github, CI/CD, automated build systems. MISRA/quality-assurance techniques ability read and understand schematics. knowledge of VHDL/Verilog for ASIC/FPGA design. This is a really fabulous role for someone who is looking to take a step up in their career looking to bring more »
arena and ensure the company understands the developments which will benefit the business. Your Profile Typically, 7+ years industry experience Strong understanding of Digital ASIC Design, Implementation & Verification flows Knowledge of Digital design techniques and coding languages (Verilog and System Verilog) Expert with Unix/Linux Environments Expert in Logic more »
Visa sponsorship is NOT available for this position) Required Skills M.Sc. or Ph.D. degree in electrical engineering/communication systems Circa 10+ years' of ASIC, digital front-end IC design experience in Verilog Full chip design of digital/mixed-signal products Ability to lead and take ownership of complex more »
as Graduate CPU Architect, you will need: A MSc degree in Electronic Engineering/Computer Science or related field A strong background within digital ASIC/FPGA design, with hands-on experience coding in VHDL/Verilog Previous project experience related to CPU design/computer architecture A deep interest more »
etc. Processor architecture, ARM, CPU, RISC-V etc SOC design and architecture, IP integration Confident ability in RTL design (Verilog/VHDL , SystemVerilog) for ASIC/FPGA Proven ability in tape-out and IP development and delivery processes Bonus/"nice-to-have" skills: High Speed Communication, Protocols - Serdes, ethernet more »
test equipment. Skills and Experience: Strong experience in digital custom IC design. Strong experience in digital IC verification (UVM, SVA, VIP, and UPF), for ASIC implementation. Strong RTL coding with Verilog and System Verilog. Strong knowledge of interface technology (I2C, SPI, UART, SWD, JTAG, etc). Strong knowledge of on more »
Cambridge, Cambridgeshire, East Anglia, United Kingdom
Langham Recruitment Limited
test equipment. Qualifications and Experience: Strong experience in digital custom IC design. Strong experience in digital IC verification (UVM, SVA, VIP, and UPF), for ASIC implementation. Strong RTL coding with Verilog and System Verilog. Strong knowledge of interface technology (I2C, SPI, UART, SWD, JTAG, etc). Strong knowledge of on more »
Greater Bristol Area, United Kingdom Hybrid / WFH Options
IC Resources
ASIC Verification Engineer - Bristol Hybrid working model and a fantastic compensation package. As a Digital Verification Senior Staff Engineer, you will work within the IP Development team in Bristol, a team with a proven track record in successful IP deliveries into Automotive Microcontrollers. This is an exciting time to join more »
Familiarity with signal processing and digital communication algorithms. Experience of working in a data communications or Consumer Electronics industry. Strong working knowledge FPGA to ASIC conversion process. For more information please contact: Nicole Chapman Nicole.chapman@clickrecruiting.co.uk more »
Experience BSC/MSc in electronics/electrical engineering (equivalent or higher). 10+ years’ experience in the semiconductor industry. Strong technical background in ASIC digital design - RTL coding, knowledge of system verilog etc, Understanding of UVM verification is a bonus Understanding of back-end/physical design flow - RTL more »
be successful in this role, the Principal Verification Engineer will need: A BSc/MSc degree in Microelectronics or similar Extensive experience in digital ASIC verification and logic verification techniques Expert level experience in SystemVerilog UVM, formal verification and coverage closure Experience leading a verification feature would be a big more »
