1 to 25 of 113 Tcl Jobs

subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms Automation experience with shell programming/scripting (g. Tcl, Perl, Python etc.) In Return: This is a new team, and there is plenty of opportunity to shape its future, and your own growth and More ❯

subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms Automation experience with shell programming/scripting (g. Tcl, Perl, Python etc.) In Return: This is a new team, and there is plenty of opportunity to shape its future, and your own growth and More ❯

subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms Automation experience with shell programming/scripting (g. Tcl, Perl, Python etc.) In Return: This is a new team, and there is plenty of opportunity to shape its future, and your own growth and More ❯

subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms Automation experience with shell programming/scripting (g. Tcl, Perl, Python etc.) In Return: This is a new team, and there is plenty of opportunity to shape its future, and your own growth and More ❯

subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms Automation experience with shell programming/scripting (g. Tcl, Perl, Python etc.) In Return: This is a new team, and there is plenty of opportunity to shape its future, and your own growth and More ❯

subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms Automation experience with shell programming/scripting (g. Tcl, Perl, Python etc.) In Return: This is a new team, and there is plenty of opportunity to shape its future, and your own growth and More ❯

in leading a design team • Experience in hardware design and hands-on lab debug • Experience with SystemVerilog/UVM • Experience with generating scripts (Perl, Tcl, Python, etc.) • Working knowledge of C/C++ • Experience with interfaces: ADC/DACs, SerDes, PCIe, JTAG, DDRx • Existing Secret (or above) Clearance AWTLINC Original More ❯

test and measurement instrument architectures, Embedded Linux, SoC (FPGA/ARM), distributed/edge computing. Programming skills in C++, C#, and scripting languages (Python, TCL). Proficiency with continuous integration and version control. Familiarity with Agile Scrum methodology. Solid understanding of digital circuit design and schematics. A keen problem solver More ❯

prior to implementation. Key Requirements: Strong FPGA/SoC design background with RTL skills in (System) Verilog and scripting skills in languages such as TCL, Python, etc. Experience implementing designs on AMD Xilinx UltraScale devices using the Vivado tool suite. Detailed understanding of timing constraints and ability to improve designs More ❯

verification, and timing analysis using tools such as Xilinx Vivado, Intel Quartus, or Microsemi Libero. Familiarity with Linux OS, C, C++, Python, Bash, and TCL scripting. Experience with hardware security, side-channel analysis, or reverse engineering. Strong leadership and project management skills, with the ability to mentor junior engineers and More ❯

verification environments Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. ( SystemVerilog), shell programming/scripting (g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies – UVM/OVM, formal, low power, emulation Exposure to all stages of verification More ❯

verification environments Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. ( SystemVerilog), shell programming/scripting (g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies – UVM/OVM, formal, low power, emulation Exposure to all stages of verification More ❯

verification environments Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. ( SystemVerilog), shell programming/scripting (g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies – UVM/OVM, formal, low power, emulation Exposure to all stages of verification More ❯

verification environments Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. ( SystemVerilog), shell programming/scripting (g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies – UVM/OVM, formal, low power, emulation Exposure to all stages of verification More ❯

verification environments Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. ( SystemVerilog), shell programming/scripting (g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies – UVM/OVM, formal, low power, emulation Exposure to all stages of verification More ❯

verification environments Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. ( SystemVerilog), shell programming/scripting (g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies – UVM/OVM, formal, low power, emulation Exposure to all stages of verification More ❯

verification environments Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. ( SystemVerilog), shell programming/scripting (g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies – UVM/OVM, formal, low power, emulation Exposure to all stages of verification More ❯

verification environments Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. ( SystemVerilog), shell programming/scripting (g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies – UVM/OVM, formal, low power, emulation Exposure to all stages of verification More ❯

verification environments Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. (SystemVerilog), shell programming/scripting (g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies – UVM/OVM, formal, low power, emulation Exposure to all stages of verification More ❯

verification environments Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. (SystemVerilog), shell programming/scripting (g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies – UVM/OVM, formal, low power, emulation Exposure to all stages of verification More ❯

verification environments Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. (SystemVerilog), shell programming/scripting (g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies – UVM/OVM, formal, low power, emulation Exposure to all stages of verification More ❯

verification environments Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. (SystemVerilog), shell programming/scripting (g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies – UVM/OVM, formal, low power, emulation Exposure to all stages of verification More ❯

/CD, Artifactory. Experience with application layer protocols, such as DNP, 1588, MQTT, and more. Knowledge of electronic components and PCB reworking. Experience with TCL scripting. Equal Employment Opportunity Statement Individuals seeking employment at Camlin are considered without regard to race, colour, religion, national origin, age, sex, marital status, ancestry More ❯

Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git VHDL High speed transceivers Memory controllers PCB Layout ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits More ❯

Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols – Ethernet, PCIe, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git VHDL High speed transceivers Memory controllers PCB Layout ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Position : Senior FPGA Engineer Location : WFH within reach of Portsmouth Salary : £60-95k Benefits More ❯