51 to 75 of 140 Tcl Jobs

Graphics and/or Cadence Verification tools - FPGA/ASIC Design experience Knowledge of digital signal processing Experience with scripting languages (Bash, Perl, Python, Tcl More ❯

Engineer desirable requirements: PCI Express, Ethernet, CoaXPress, MIPI, QSFP and DDR4/5. JTAG-based test, (XJTAG ideal). C/C++, Python/TCL/Shell CI/CD Agile ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Position : FPGA Engineer Location : Slough Salary : £45-60k Key Skills : FPGA design Desirable skills : PCI Express, Ethernet, CoaXPress More ❯

levels Experience with modern, commercial-grade, functional simulators (e.g., Xcelium, Incisive, Questa, VCS, Riviera-Pro, etc) Writing scripts for batched verification tasks: Python, Bash, Tcl, make files. Revision control systems for maintaining, sharing, and deploying code: Perforce, git, SVN, etc. Familiarity with debugging and isolating issues with gate-level netlists More ❯

Cloud-based solutions Knowledge of standard interface protocols such as PCIe, AMBA, USB, DDR, DisplayPort, etc. Commercial awareness of EDA companies and solutions Linux, Tcl/Python/shell, C/C++, DPI, SCE-MI, SystemC, UVM Connect, UVM Framework Background in consulting or other customer services subject area About More ❯

experience of PCB schematic capture using suitable CAD software. A familiarity with programming and scripting skills in one or more of VB script, python, tcl & bash. Ability to do basic statistical and data analysis for silicon devices and test results. Who You Are: You are an analytical thinker with excellent More ❯

on experience with HDL: Verilog, System Verilog, or VHDL. Excellent logical reasoning and a quick learner with good communication skills. Good in scripting using TCL, Perl. Comfortable with Unix, Linux environment. Exposure to the industry standard tools in VLSI digital design will be preferred. Company Description Renesas is one of More ❯

O interfaces Experience with SystemVerilog Assertions (SVA) FPGA/ASIC design and/or development process experience Experience with scripting languages (Bash, Perl, Python, Tcl, Makefile) Knowledge of digital signal processing More ❯

/or VHDL. Strong verification mindset with in-depth knowledge of verification goals, practices, and methodologies. Practical experience with scripting languages such as csh, Tcl, Python, Perl, etc. Excellent verbal communication and documentation skills, with the ability to work effectively within cross-functional teams. Additional Information: This is an on More ❯

/or VHDL. Strong verification mindset with in-depth knowledge of verification goals, practices, and methodologies. Practical experience with scripting languages such as csh, Tcl, Python, Perl, etc. Excellent verbal communication and documentation skills, with the ability to work effectively within cross-functional teams. Additional Information: This is an on More ❯

DOORS, Siemens QuestaSim/ModelSim, Synopsys Synplify Pro Standards: IEC 61513, IEC 62566, IEC26262, DO 254; techniques like UVM, Formal Verification Languages: VHDL, SystemVerilog, TCL, Python We are committed to diversity, inclusion, and equal opportunity. More info at Security clearance (SC) and UK nationality are required for employment due to More ❯

work rotating 12-hour shifts and provide on-call support (1 week every 6-10 weeks) • Technical skills: o Familiarity with Linux and scripting (TCL/TK or PERL) o Proficiency in Microsoft Office • Strong communication, presentation, and coordination skills • Experience working in a multi-contractor, badge-less team environment More ❯

teams. What we need from you What you really must have: Experience leading teams or managing packages of work. Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM. FPGA architectures such as Xilinx 7, Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet More ❯

power intent Proficient in RTL development using SystemVerilog Experience in functional verification techniques , specifically UVM Proficient with Unix command line and scripting languages like Tcl, Perl or Python Ideally, hands-on experience on off-chip communication and/or external memory protocols (e.g., xSPI, Hyperbus) Proven ability to work and More ❯

power intent Proficient in RTL development using SystemVerilog Experience in functional verification techniques , specifically UVM Proficient with Unix command line and scripting languages like Tcl, Perl or Python Ideally, hands-on experience on off-chip communication and/or external memory protocols (e.g., xSPI, Hyperbus) Proven ability to work and More ❯

power intent Proficient in RTL development using SystemVerilog Experience in functional verification techniques , specifically UVM Proficient with Unix command line and scripting languages like Tcl, Perl or Python Ideally, hands-on experience on off-chip communication and/or external memory protocols (e.g., xSPI, Hyperbus) Proven ability to work and More ❯

power intent Proficient in RTL development using SystemVerilog Experience in functional verification techniques , specifically UVM Proficient with Unix command line and scripting languages like Tcl, Perl or Python Ideally, hands-on experience on off-chip communication and/or external memory protocols (e.g., xSPI, Hyperbus) Proven ability to work and More ❯

power intent Proficient in RTL development using SystemVerilog Experience in functional verification techniques , specifically UVM Proficient with Unix command line and scripting languages like Tcl, Perl or Python Ideally, hands-on experience on off-chip communication and/or external memory protocols (e.g., xSPI, Hyperbus) Proven ability to work and More ❯

Puppet, Chef, SMS, Satellite, etc. Knowledge of interpreted and compiled computer programming languages such as Python, Java, C, Objective C, C++, C Sharp, SQL, Tcl, Perl, PHP. Assembly, CUDA, and GPU language experience desirable. Knowledge of advanced computing technologies such as parallel processing, in-memory databases, graph databases and graph More ❯

languages, in particularly writing and debugging Linux/Unix bash scripts is an advantage. Knowledge of a programming language such as C, Java, python, TCL, VBA More ❯

languages, in particularly writing and debugging Linux/Unix bash scripts is an advantage. Knowledge of a programming language such as C, Java, python, TCL, VBA More ❯

languages, in particularly writing and debugging Linux/Unix bash scripts is an advantage. Knowledge of a programming language such as C, Java, python, TCL, VBA More ❯

SystemVerilog/Verilog-2001. Verification: UVM, SystemVerilog Assertions, JasperGold/VC Formal. Power: UPF/CPF-driven flows, dynamic voltage-frequency scaling. Automation: Python & TCL scripting for flow orchestration, data mining, and regressions. Version Control: Git-based, trunk-oriented CI/CD. Must-Haves Proven ownership of high-performance compute More ❯

SystemVerilog/Verilog-2001. Verification: UVM, SystemVerilog Assertions, JasperGold/VC Formal. Power: UPF/CPF-driven flows, dynamic voltage-frequency scaling. Automation: Python & TCL scripting for flow orchestration, data mining, and regressions. Version Control: Git-based, trunk-oriented CI/CD. Must-Haves Proven ownership of high-performance compute More ❯

Bonus: Experience with GPU, vector processors, or AI accelerators • Bonus: Familiarity with RISC-V architecture • Strong debugging and analytical skills • Scripting experience (Python, Perl, TCL) • Degree in Electrical Engineering, Computer Engineering, or similar Why join our client: • Be part of a forward-thinking company at the forefront of open hardware More ❯

Bonus: Experience with GPU, vector processors, or AI accelerators • Bonus: Familiarity with RISC-V architecture • Strong debugging and analytical skills • Scripting experience (Python, Perl, TCL) • Degree in Electrical Engineering, Computer Engineering, or similar Why join our client: • Be part of a forward-thinking company at the forefront of open hardware More ❯