1 to 25 of 110 PCIe Jobs in the UK

Essential requirements: Design tools such as Xilinx, TCL, Verilog, System Verilog, and UVM FPGA architectures like Xilinx 7, Xilinx UltraScale, Intel (Altera), or Microsemi (Actel) Fast interfaces such as PCIe, Ethernet, and JESD Auto-generated code using model-driven engineering with Matlab and Simulink Derivation of detailed firmware requirements and architecture from system requirements A structured approach to firmware design More ❯

Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet, and JESD is also required. Auto-generated code using model driven engineering using Matlab and Simulink tools Derivation of detailed Firmware requirements and architecture from system requirements A structured More ❯

Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet, and JESD is also required. Auto-generated code using model driven engineering using Matlab and Simulink tools Derivation of detailed FPGA/Firmware requirements and architecture from system requirements More ❯

a continuous real‐time data stream. Proven success closing timing on multi‐hundred‐MHz to multi‐GHz clock domains and integrating high‐speed IP (e.g., SerDes, HBM/DDR, PCIe, 100 GbE or similar). Expertise with industry‐standard EDA flows: RTL synthesis, CDC/RDC, STA, power‐intent (UPF/CPF), lint, and gate‐level simulation. Demonstrated FPGA prototyping More ❯

languages Strong communication skills Hardware/software codesign Ethernet & TCP/IP Embedded systems ideally with experience of system software and device drivers Understanding of server system architectures e.g. PCI-Express Experience of linux systems Experience of digital design (EDA tools, Verilog, VHDL) Benefits offered are described: AMD benefits at a glance . AMD does not accept unsolicited resumes from More ❯

Verification (UVM/system verilog) OR Formal verification methods - Jasper Gold, C/system C Definition of complex architecture High-speed digital connectivity and protocols - Fabric, Serdes, ethernet, USB, PCIe, AMBA/AXI, CHI, MAC, PHY, cache coherency - MESI SOC/IP integration for complex embedded processors - ARM/RISC-V/CPU/GPU algorithm development/computer arithmetic More ❯

Verification (UVM/system verilog) OR Formal verification methods - Jasper Gold, C/system C Definition of complex architecture High-speed digital connectivity and protocols - Fabric, Serdes, ethernet, USB, PCIe, AMBA/AXI, CHI, MAC, PHY, cache coherency - MESI SOC/IP integration for complex embedded processors - ARM/RISC-V/CPU/GPU algorithm development/computer arithmetic More ❯

modern data centers. Responsibilities: Writing and testing IP components in SystemVerilog for FPGABuilding full applications for FPGA using our IP library Integrating with third party IP for external memory PCIe subsystems Extending IP verification code and integrating into automated test environments Working with software interface routines to support FPGA integration into the software stacks Learning about a range of Machine More ❯

highly successful, they maintain a small business atmosphere with a start-up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. More ❯

highly successful, they maintain a small business atmosphere with a start-up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. More ❯

highly successful, they maintain a small business atmosphere with a start-up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. More ❯

highly successful, they maintain a small business atmosphere with a start-up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols – Ethernet, PCIe, USB, NVMe, CXL etc C/C++. More ❯

highly successful, they maintain a small business atmosphere with a start-up culture. Senior FPGA Engineer essential requirements At least 5+ years relevant FPGA experience Good understanding of the PCIe spec OR very experienced designer of FPGA cores. Familiarity with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, PCIe, USB, NVMe, CXL etc C/C++. More ❯

VHDL test benches to verify designs. Debug of embedded systems comprising hardware, software (processor) and firmware (FPGA) designs. Experience in designing/integrating firmware for high-speed standards e.g. PCIe, JESD204B, 10GBASE-X, 25GBASE-X. Experience in using test equipment associated with digital hardware/firmware design testing such as high-speed oscilloscopes and logic analysers. Design of sophisticated prototype … Design experience with C/C++ for embedded systems. Design experience/working knowledge of Python to aid verification test. Experience in designing hardware for high-speed standards e.g. PCIe, JESD204B, 10GBASE-X, 25GBASE-X. Experience with the Atlassian toolset (Confluence, Jira, Bitbucket). Employment terms: Hours: 37.5 per week Location: Malvern Clearance: SC essential Probation: 3 months Duration: Permanent More ❯

in MATLAB/Simulink (algorithm development out of scope) Strong verification expertise in OSVVM/UVVM (or UVM) methodologies and test bench architecture Familiar with technologies such as AXI, PCIe, Ethernet, OCP, Wishbone, JESD204, CameraLink, SMPTE Solid understanding of DO-254 processes (not necessarily certification) About us Akkodis is a global leader in engineering, technology, and R&D, harnessing the More ❯

ARM-based designs and/or ARM System Architectures. Familiarity with ARM debugger and trace features e.g ARM DS, DSTREAM. Experience with verification methodologies - UVM/OVM. Knowledge of PCIe and CXL will be a plus. Accommodations at Arm At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please More ❯

understanding of ASIC/SoC prototyping in FPGA. Working with the latest Xilinx UltraScale+ devices and tools. Knowledge/Experience of implementation of FPGA peripherals such as DDR memory, PCIe and high speed interfaces. Programming languages such as: assembly language (ideally Arm assembler), higher-level (e.g. C), object-orientated (e.g. C++)Use of a UNIX environment and shell programming Version More ❯

to enable our partners to produce outstanding systems! Responsibilities: As a creative verification engineer with a knowledge of SoC integration verification, SoC scenario verification, SoC performance verification, CHI/PCIe/CXL, DDRx/LPDDRx integration verification in SoC RTL. Your key responsibilities will include writing test plans, defining test methodologies, developing SystemVerilog/Verilog testbenches and tests, and debugging … Crossing verification Experienced in GLS, DFT/DFD, Power Aware verification techniques Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures. Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms Automation experience with shell programming/scripting (g. Tcl, Perl, Python etc.) In Return: This is a More ❯

power supplies Knowledge of EMC implications of hard speed transmission Scripting and automation, such as TCL and Python. Knowledge of thermal and mechanical considerations in hardware design. Experience using PCIe, CXL, RDMA, DDR4, bare metal use of high-speed transceivers, Ethernet, IP. Good experience in FPGA, SystemVerilog/Verilog/VHDL. The company offer an excellent salary, along with a More ❯

with good oral and written communication skills Desirable skills: - Team leadership skills - Familiarity with C/C++ - Prior SSD design experience with any of the following storage interfaces: SAS, PCIe (NVMe preferred) or SATA Benefits Include: - Private health insurance under the company scheme available for you, your spouse and dependants as appropriate. This benefit is optional as there is a More ❯

with good oral and written communication skills Desirable skills: - Team leadership skills - Familiarity with C/C++ - Prior SSD design experience with any of the following storage interfaces: SAS, PCIe (NVMe preferred) or SATA Benefits Include: - Private health insurance under the company scheme available for you, your spouse and dependants as appropriate. This benefit is optional as there is a More ❯

bridge the gap between silicon, board-level hardware, and full system integration. Responsibilities Design and develop high-speed electronic circuits including SERDES interfaces, clocking networks, and memory interconnects (e.g., PCIe, DDR4/5, Ethernet). Conduct comprehensive silicon validation, including bring-up of custom ASICs and validation of electrical interfaces under real-world conditions. Develop and deploy automated hardware test … designs, validation results, and bring-up procedures for internal stakeholders and product teams. Skills & Experience 7+ years of experience in high-speed digital electronics design, including interfaces such as PCIe, DDR4/5, Ethernet, and SERDES. Strong understanding of signal integrity (SI) and power integrity (PI) principles, including simulation and analysis using tools like HyperLynx, ADS, or Sigrity. Proven experience More ❯

of Arm system architectures. Experience with power-aware design and clock domain crossing. Knowledge of embedded operating systems, device drivers, microprocessors, and embedded hardware architectures. Experience verifying subsystems like PCIe, LPDDR, HBM, UCIe, Ethernet. Experience with large SoC development on emulation platforms. Additional Information: At Arm, we support accommodations during recruitment. Contact for assistance. We also promote hybrid working, balancing More ❯

Github, ctypes, SWIG Experience of automated testing Embedded processors Networking (Ethernet, TCP/IP, IB) Financial protocol and algorithmic experience High speed networking/serial protocols/transceivers/PCIe Salary: Variable – they are market leaders in compensation & pay talent based on their technical ability and what they deserve. They do not base offers on your current earnings or average More ❯

designs and/or ARM System Architectures. Familiarity with ARM debugger and trace features e.g ARM DS, DSTREAM. Knowledge of memory subsystems and/or high speed peripherals (e.g. PCIe/CXL) will be a plus, including integration of these IP models into a design. Accommodations at Arm At Arm, we want to build extraordinary teams. If you need an More ❯