1 to 25 of 33 SystemVerilog Jobs in Cambridgeshire

Job Overview: We are looking for an FPGA/Embedded-Systems Engineer to join Arm's Solution Engineering FPGA Design team on a permanent basis. The team is based in Cambridge UK, working at the forefront of Arm based embedded More ❯

DSP, or FPU architectures and debugging/testing strategies. Hands-on experience with ASIC, FPGA, and physical design tools (P&R). Proficiency in SystemVerilog, C, SystemC, C++, Python, Perl, or TCL. Knowledge of place and route methodologies. Strong communication skills, both written and spoken, in English. Who we are More ❯

subject FPGA or ASIC architecture, design and verification, including: System engineering and partition IP Design, Packaging and Integration Xilinx Vivado or Altera Quartus Verilog, SystemVerilog Timing Closure Self-checking/Automated Testbenches integrated into CI Electronic design experience including high-speed design and high-level layout Technical leadership experience Knowledge More ❯

embedded C/C++ based SoC verification environments. Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. (SystemVerilog), shell programming/scripting (e.g. Tcl, Perl, Python etc.). Experienced in one or more of various verification methodologies - UVM/OVM, formal, low power More ❯

might also have experience of one or more of the following: Build systems (e.g. Bazel, Nextflow, FuseSoC) Hardware EDA tools (eg. simulation, linting, synthesis) Systemverilog, C/C++, Simulator DPI/VPI Containerization (eg. Docker) Distributed Compute, Orchestration Jenkins Automation Software templating, rendering Data Engineering/Data Science/Machine More ❯

language. Understanding of computer architecture fundamentals, such as pipelining, exception handling, memory systems. Perhaps some practical experience of working on microprocessor designs. Familiarity with SystemVerilog, maybe using a methodology such as UVM. Python programming experience, for example to automate verification flows. C++ programming experience, maybe in the context of a More ❯

language. Understanding of computer architecture fundamentals, such as pipelining, exception handling, memory systems. Perhaps some practical experience of working on microprocessor designs. Familiarity with SystemVerilog, maybe using a methodology such as UVM. Python programming experience, for example to automate verification flows. C++ programming experience, maybe in the context of a More ❯

language. Understanding of computer architecture fundamentals, such as pipelining, exception handling, memory systems. Perhaps some practical experience of working on microprocessor designs. Familiarity with SystemVerilog, maybe using a methodology such as UVM. Python programming experience, for example to automate verification flows. C++ programming experience, maybe in the context of a More ❯

language. Understanding of computer architecture fundamentals, such as pipelining, exception handling, memory systems. Perhaps some practical experience of working on microprocessor designs. Familiarity with SystemVerilog, maybe using a methodology such as UVM. Python programming experience, for example to automate verification flows. C++ programming experience, maybe in the context of a More ❯

of verifying CPU architectures or other complex IP (e.g. GPUs, NNAs) Fluency and the ability to write clear and concise code in languages like SystemVerilog, Python, C++, Rust, or Go Past verification ownership of multiple design blocks Analytical thinking, self-sufficiency and strong team collaboration skills Ability to work effectively More ❯

existing designs, finding high-quality and economical solutions to address new and evolving use cases as well as latest industry standards. Write RTL, in SystemVerilog, to implement new features and expand and maintain existing features across the OpenTitan IP portfolio. Work closely with DV engineers to develop test and coverage More ❯

feedback and who can independently define the scope of work. Proven experience of testbench design with verification frameworks like UVM/OVM. Knowledge of SystemVerilog assertion (SVA). Exposure to different programming languages, such as C, C++ and Python. You have formal verification experience. What you can expect from us More ❯

of own work YOU SHOULD HAVE: Over 5 years recent and relevant module design experience within at least one HDL (VHDL/Verilog/SystemVerilog) Knowledge of computer systems and architecture Ability to write clear and concise code Experience with digital circuit simulation User knowledge of Linux Knowledge of versioning More ❯

Ability to lead technical discussions across architecture, firmware, software, and validation teams. "Nice To Have" Skills and Experience : Familiarity with RTL design, UVM/SystemVerilog, or hardware verification flows. Experience with trusted execution environments (TEEs) and secure monitor implementation. Understanding of secure firmware update mechanisms (rollback protection, anti-cloning). More ❯

Company: Qualcomm Technologies International Ltd Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm invents breakthrough technologies that transform how the world computes, connects, and communicates. Today, our inventions are the foundation for life-changing products, experiences, and More ❯

Your primary focus will be working on IP and SoC Verification. This position reports to the Sr. Manager, Digital Design Verification. Job Duties Develop SystemVerilog-UVM testbenches and resolve complex test bench challenges Define and implement a functional coverage model to ensure complete design verification Ensure the design verification meets … IPs and take end-to-end ownership of their verification Contribute to improving the verification strategy and architecture of SoC testbenches Strong proficiency in SystemVerilog and UVM Understanding of industry-standard protocols such as USB, AMBA and I3C Proficiency in scripting languages including Python, Perl, or Tcl Proficiency in C More ❯

We are excited to be supporting an established SME working on Radar Systems for a variety of security and surveillance activities. They are currently looking to add an FPGA Engineer to their design team to push forward their latest product More ❯

We are excited to be supporting an established SME working on Radar Systems for a variety of security and surveillance activities. They are currently looking to add an FPGA Engineer to their design team to push forward their latest product More ❯

We are excited to be supporting an established SME working on Radar Systems for a variety of security and surveillance activities. They are currently looking to add an FPGA Engineer to their design team to push forward their latest product More ❯

We are excited to be supporting an established SME working on Radar Systems for a variety of security and surveillance activities. They are currently looking to add an FPGA Engineer to their design team to push forward their latest product More ❯

Company: Qualcomm Technologies International Ltd Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm invents breakthrough technologies that transform how the world computes, connects, and communicates. Today, our inventions are the foundation for life-changing products, experiences, and More ❯

About Us Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop new and highly innovative electronic products faster and more cost-effectively. Our customers use our tools More ❯

Design Engineer is sought to join a dynamic team. The ideal candidate will have a strong background in RTL Design and be proficient in SystemVerilog and Verilog. This position offers the opportunity to work on cutting-edge projects and contribute to the development of innovative solutions in the field of … working with and huge growth plans. Responsibilities Collaborates with cross-functional teams to define and implement ASIC architectures Designs and develops RTL code using SystemVerilog and Verilog Conducts design verification and ensures compliance with specifications Participates in the integration and testing of ASICs Contributes to the improvement of design methodologies … Bachelor's or Master's degree in Electrical Engineering or related field Demonstrates a solid understanding of ASIC design principles and methodologies Proficient in SystemVerilog, Verilog, and RTL Design Possesses familiarity with security-related applications and protocols, which is a plus Exhibits strong problem-solving skills and attention to detail More ❯

Design Engineer is sought to join a dynamic team. The ideal candidate will have a strong background in RTL Design and be proficient in SystemVerilog and Verilog. This position offers the opportunity to work on cutting-edge projects and contribute to the development of innovative solutions in the field of … working with and huge growth plans. Responsibilities Collaborates with cross-functional teams to define and implement ASIC architectures Designs and develops RTL code using SystemVerilog and Verilog Conducts design verification and ensures compliance with specifications Participates in the integration and testing of ASICs Contributes to the improvement of design methodologies … Bachelor's or Master's degree in Electrical Engineering or related field Demonstrates a solid understanding of ASIC design principles and methodologies Proficient in SystemVerilog, Verilog, and RTL Design Possesses familiarity with security-related applications and protocols, which is a plus Exhibits strong problem-solving skills and attention to detail More ❯

Design Engineer is sought to join a dynamic team. The ideal candidate will have a strong background in RTL Design and be proficient in SystemVerilog and Verilog. This position offers the opportunity to work on cutting-edge projects and contribute to the development of innovative solutions in the field of … working with and huge growth plans. Responsibilities Collaborates with cross-functional teams to define and implement ASIC architectures Designs and develops RTL code using SystemVerilog and Verilog Conducts design verification and ensures compliance with specifications Participates in the integration and testing of ASICs Contributes to the improvement of design methodologies … Bachelor's or Master's degree in Electrical Engineering or related field Demonstrates a solid understanding of ASIC design principles and methodologies Proficient in SystemVerilog, Verilog, and RTL Design Possesses familiarity with security-related applications and protocols, which is a plus Exhibits strong problem-solving skills and attention to detail More ❯