26 to 39 of 39 PCIe Jobs in England

Experience designing IP blocks (Nice to have) IP Block design for caches, coherency, memory subsystems, and interconnects Knowledge of RAS, QoS in fabrics, and PCIe/IO (a plus) Familiarity with Python Any experience with LLM accelerator chips, RISC-V processors, Cache and AMBA protocols will be advantageous. As well ...

speed digital circuits using advanced CMOS technologies. Proficient RTL design skills (SystemVerilog preferred). Experience with PHY design for high-speed interfaces (e.g., USB4, PCIe) is a strong advantage. Advanced understanding of low-power and high-speed design techniques. Knowledge of signal-processing concepts (a plus). Familiarity with scripting ...

building high-performance APIs that interface with hardware acceleration. Expect a mix of: Real-time C/C++ for wireless signal processing Linux, DPDK, PCIe, SIMD, modern C++ Hardware/software integration and performance tuning Designing, testing, optimising and owning your software through to delivery Working with DSP, FPGA, verification ...

multi-phase), LDOs, and PCB design practices for efficient power delivery Processor system development (e.g., STM32) with experience in processor interfaces such as Ethernet, PCIe, DDR, Flash, USB, I2C, SPI, JTAG, etc. Experience with SERDES technologies (e.g., 112 Gbps, PAM4) is a strong benefit Other Desired Experience Demonstrable experience ...

transfer to mass production. Key skills : - DCDC voltage (including multi-phase) regulators, linear regulators , PCB design, power delivery, Processor system development, STM32, Ethernet, PCIe, DDR, FLASH, USB, I2C, SPI, JTAG, SERDES (eg 112Gbps, PAM4) Experience Demonstrable experience in digital circuit development and validation Extensive practical lab experience, bringing up, debugging ...

architecture, integration, timing closure, place-and-route (P&R), constraints and optimisation. The role focuses on high-speed digital interfaces such as 100Gb Ethernet, PCIe Gen5, AXI/AMBA, and requires strong expertise in Vivado, Vitis, Python, Tcl, Git and CI/CD workflows.Key ResponsibilitiesDesign high-performance IP using SystemVerilog … FPGA/Adaptive SoCDeliver synthesis-ready RTL meeting timing, P&R and integration requirementsImplement and optimise 100GbE, PCIe Gen5, AXI/AMBA IP blocksDrive timing closure using Vivado toolchainsDevelop automation using Python/Tcl scriptingCollaborate with hardware, SoC, firmware and integration teamsEssential SkillsStrong SystemVerilog RTL design experienceFPGA/Adaptive ...

environments.Key ResponsibilitiesDesign and implement UVM/SystemVerilog verification environmentsDeliver constrained-random verification and achieve coverage sign-offVerify high-speed interfaces including Ethernet (100G) and PCIe (Gen4/Gen5)Integrate and use Verification IP (VIP)Develop and maintain Python-based regression and CI workflowsCollaborate with design, architecture, and SoC teamsEssential Skills … ExperienceStrong experience as a Verification Engineer/Design Verification EngineerExpert knowledge of UVM and SystemVerilogExperience with Ethernet, PCIe, AMBA/AXIProven ownership of test plans and coverage closurePython scripting and Git-based workflowsExperience in ASIC, SoC, or IP verification environmentsDesirableExperience with Vivado/Vitis or adaptive SoC flowsEmbedded processor ...

functional validation of a new SoC designed with high-end ARM processors . Execute functional bring-up of SoC interfaces such as LPDDR, Ethernet, PCIe, HBM, CPUs, Low-Speed IOs (UART, I2C, I3C, SPI), and Coherent Mesh. Develop bare-metal C tests and debug using FPGA HAPS/Zebu emulation … Verification, Electrical Testing & Characterization, and Production Firmware teams . Essential Skills Strong proficiency in Embedded C . Experience with high-speed protocols such as PCIe Gen6, die-to-die links, LPDDR5, and HBM3. Hands-on expertise with ARM high-end CPUs and ARM cache-coherent interconnect protocols . Proven validation ...

Responsibilities Perform functional validation of a new SoC designed with high-end processors. Execute functional bring-up of SoC interfaces such as LPDDR, Ethernet, PCIe, HBM, CPUs, Low-Speed IOs (UART, I2C, I3C, SPI), and Coherent Mesh. Develop bare-metal C tests and debug using FPGA HAPS/Zebu emulation … Architects, RTL Verification, Electrical Testing & Characterization, and Production Firmware teams. Essential Skills Strong proficiency in Embedded C. Experience with high-speed protocols such as PCIe Gen6, die-to-die links, LPDDR5, and HBM3. Hands-on expertise with ARM high-end CPUs and ARM cache-coherent InterconnecT protocols. Proven validation experience ...

Perform functional validation of a new SoC designed with high-end ARM processors. Execute functional bring-up of SoC interfaces such as LPDDR, Ethernet, PCIe, HBM, CPUs, Low-Speed IOs (UART, I2C, I3C, SPI), and Coherent Mesh. Develop bare-metal C tests and debug using FPGA HAPS/Zebu emulation … Architects, RTL Verification, Electrical Testing & Characterization, and Production Firmware teams. Essential Skills Strong proficiency in Embedded C. Experience with high-speed protocols such as PCIe Gen6, die-to-die links, LPDDR5, and HBM3. Hands-on expertise with ARM high-end CPUs and ARM cache-coherent interconnect protocols. Proven validation experience ...

Perform functional validation of new SoC designs featuring high-end ARM processors. Execute SoC bring-up and validation of key interfaces including: LPDDR, Ethernet, PCIe, HBM CPUs and Coherent Mesh Low-speed IOs (UART, I2C, I3C, SPI) Develop and execute bare-metal C test cases . Debug and validate designs … . Hands-on experience with ARM high-end CPUs and cache-coherent interconnect protocols . Experience with high-speed interfaces and protocols such as: PCIe Gen6 Die-to-die links LPDDR5 HBM3 Proven experience in pre-silicon and post-silicon SoC validation environments. Desirable Skills: Python scripting for automation ...

execute UVM testbenches for unit-level and sub-system verification Perform coverage analysis and drive coverage closure to ensure verification completeness Work with PCIe, AMBA CHI, and AXI protocols for system verification Collaborate with design and verification teams to ensure timely delivery of high-quality designs Required Skills & Experience: Strong … experience with PCIe protocol verification Expertise in UVM methodology for both unit-level and sub-system level verification Hands-on experience with AMBA CHI & AXI interfaces Proven experience in coverage analysis and closure Strong problem-solving and debugging skills in a collaborative team environment Working Pattern: 3 days per week ...

Location: Malvern, Worcestershire, West Midlands, UKYT Tech are on the lookout for a FPGA DSP engineer for a company in Malvern.Thecompanyareinthedefenceindustryandarelookingforsomeonetocontribute with a lot of design and development of system and subsystems and RF signal ...

contribute to innovative projects that push the boundaries of technology. The position focuses on high-speed digital design, with a particular emphasis on DDR, PCIe, and Ethernet technologies. The successful candidate will be responsible for designing, developing, and testing hardware components, ensuring they meet the highest standards of performance … passionate about advancing technological frontiers. Key Responsibilities for the Hardware Design Engineer: - Design and develop high-speed digital hardware components. - Implement and optimise DDR, PCIe, and Ethernet interfaces. - Conduct thorough testing and validation of hardware designs. - Collaborate with cross-functional teams to ensure seamless integration. - Troubleshoot and resolve design issues ...