51 to 64 of 64 Code Coverage Jobs in the UK

and maintain verification infrastructure in collaboration with design teams and external partners. Define and implement detailed verification strategies and architectures to ensure product quality and performance. Manage functional and code coverage metrics to track and report progress. Troubleshoot, debug and resolve issues while maintaining quality tracking dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM More ❯

and maintain verification infrastructure in collaboration with design teams and external partners. Define and implement detailed verification strategies and architectures to ensure product quality and performance. Manage functional and code coverage metrics to track and report progress. Troubleshoot, debug and resolve issues while maintaining quality tracking dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM More ❯

and maintain verification infrastructure in collaboration with design teams and external partners. Define and implement detailed verification strategies and architectures to ensure product quality and performance. Manage functional and code coverage metrics to track and report progress. Troubleshoot, debug and resolve issues while maintaining quality tracking dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM More ❯

and maintain verification infrastructure in collaboration with design teams and external partners. Define and implement detailed verification strategies and architectures to ensure product quality and performance. Manage functional and code coverage metrics to track and report progress. Troubleshoot, debug and resolve issues while maintaining quality tracking dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM More ❯

and maintain verification infrastructure in collaboration with design teams and external partners. Define and implement detailed verification strategies and architectures to ensure product quality and performance. Manage functional and code coverage metrics to track and report progress. Troubleshoot, debug and resolve issues while maintaining quality tracking dashboards and automated regression tests. Requirements: Strong proficiency in SystemVerilog and UVM More ❯

MEng/MSc Degree or equivalent in Electronics, Computer Science, or related disciplines. Experience in metric-driven verification, planning, requirements extraction, directed and constrained random verification, and functional and code coverage analysis. Proficiency in testbench design with verification frameworks like UVM/OVM, e, VMM. Scripting experience with Ruby, sh/csh, TCL, Make, Perl. This position is More ❯

MEng/MSc Degree or equivalent in Electronics/Computer Science or other related discipline. Metric driven verification - verification planning, requirements extraction - Directed and constrained random verification - Functional and code coverage analysis SystemVerilog - SVA (SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills - RTL - Testbench, OOP - Gate level (including SDF) Scripting experience More ❯

MEng/MSc Degree or equivalent in Electronics/Computer Science or other related discipline. Metric driven verification - verification planning, requirements extraction - Directed and constrained random verification - Functional and code coverage analysis SystemVerilog - SVA (SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills - RTL - Testbench, OOP - Gate level (including SDF) Scripting experience More ❯

discipline. Proven track record in delivering 1st time success with complex mixed signal IC's. Metric driven verification - verification planning, requirements extraction - Directed and constrained random verification - Functional and code coverage analysis SystemVerilog - SVA (SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills - RTL - Testbench, OOP - Gate level (including SDF) Strong ability More ❯

discipline. Proven track record in delivering 1st time success with complex mixed signal IC’s. Metric driven verification - verification planning, requirements extraction - Directed and constrained random verification - Functional and code coverage analysis SystemVerilog - SVA (SystemVerilog Assertions) Testbench design with verification frameworks like UVM/OVM, e, VMM Debugging skills - RTL - Testbench, OOP - Gate level (including SDF) Strong ability More ❯

or equivalent in electronics engineering with FPGA tools & technologies (e.g., Microchip, Xilinx, SoC, Modelsim, Matlab, Simulink) Demonstrable practical experience of FPGA design and verification (VHDL) including requirements capture, simulation, code coverage, synthesis, place & route, and timing analysis & closure. Configuration management experience of large complex FPGA designs. Ability to collaborate closely with other engineering disciplines. Proven track record in More ❯

equivalent in electronics engineering Experience with FPGA tools & technologies (e.g., Microchip, Xilinx, SoC, Modelsim, Matlab, Simulink) Demonstrable practical experience of FPGA design and verification (VHDL) including requirements capture, simulation, code coverage, synthesis, place & route, and timing analysis & closure. Configuration management experience of large complex FPGA designs. Ability to collaborate closely with other engineering disciplines. Proven track record in More ❯

Design Verification: • Create coverage driven verification plan document. • Create UVM verification environment. • Verify CPU connectivity to IP blocks (using ASM boot , and C code, GNU toolchain ) • The tasks will include writing test plans, defining test methodologies, developing test benches, writing testcases, completing functional verification and closing coverage for all the agreed design blocks in the SoCs/… Subsystems • Run regressions, debug test failures and file bug report as needed. • Develop tests to meet functional coverage and code coverage requirements defined for the project, based on analysis of coverage gaps. • Provide verification report as needed to show all implemented tests passing on the RTL. • Methodologies will include a mix of design checks, verification techniques More ❯

and ad-hoc face to face meetings. Collaboration: Work closely with design and micro-architecture teams to understand functional and performance/parametric specifications. Quality Assurance: Ensure thorough verification coverage and adherence to industry standards, as well as ensure the team follows expected company procedures, practices & flows. Problem Solving: Identify and resolve verification issues, providing technical guidance and support. … UVM), strong analytical and problem-solving skills, excellent communication and leadership abilities. Knowledge of mixed-signal ASIC architectures, real number modelling, constrained random, assertions, gate-level simulations, functional/code coverage, and formal verification techniques. Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s More ❯