Generating complex FPGA architectures and design implementations (VHDL, Simulink etc), targeting Xilinx, Intel, Microsemi devices. Verifying complex FPGA implementations using VHDL and System Verilog\UVM test-bench methodologies. Using FPGA design tool-sets and Mentor verification tools (QuestaSim & ModelSim). Generating low-level software (C) to facilitate FPGA test and more »
Generating complex FPGA architectures and design implementations (VHDL, Simulink etc), targeting Xilinx, Intel, Microsemi devices. Verifying complex FPGA implementations using VHDL and System Verilog\UVM test-bench methodologies. Using FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim). Generating low-level software (C) to facilitate FPGA test and integration more »
Stevenage, Hertfordshire, South East, United Kingdom
Henderson Scott
Generating complex FPGA architectures and design implementations (VHDL, Simulink etc), targeting Xilinx, Intel, Microsemi devices. Verifying complex FPGA implementations using VHDL and System Verilog\UVM test-bench methodologies. Using FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim). Generating low-level software (C) to facilitate FPGA test and integration more »
Using FPGA technologies especially from either Xilinx, Microsemi (Actel) or Lattice and their tools * Advanced verification techniques using either VHDL or System Verilog/UVM * Specifying complex timing and area constraints for efficient FPGA place and route * Ability to analyse system level requirements and derive detailed Firmware requirements * A methodical more »
verification, Synopsys DesignCompiler for synthesis and STA, Spyglass for linting, etc. Experience in writing IP design specifications and block level modules Good knowledge of UVM, SVA, VIP, and UPF for digital IC design verification Familiar with Linux OS, revision control like Git and scripting languages like Bash, Tcl, and Python more »
verification, Synopsys DesignCompiler for synthesis and STA, Spyglass for linting, etc. Experience in writing IP design specifications and block level modules Good knowledge of UVM, SVA, VIP, and UPF for digital IC design verification Familiar with Linux OS, revision control like Git and scripting languages like Bash, Tcl, and Python more »
facilities to deliver Firmware for complex digital systems that meet challenging future customer requirements. • Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM • FPGA architectures such as Xilinx 7. Xilinx UltraScale Intel (Altera) or Microsemi (Actel) • Fast interfaces such as PCIe, Ethernet, and JESD is also required • Auto more »
debug and testing methodologies. Experience of System Verilog for design and/or verification. Experience or knowledge of place and route methodologies. Experience of UVM Experience of C, SystemC, C++, Python, Perl, TCL. For more information and a confidential discussion please contact Rachel Mason. more »
Electronic Engineering or equivalent degree; Full and deep understanding of the CPU architectures is an advantage; Expertise in hardware verification languages such as SV UVM, UVM and SVAs, and SystemVerilog; Knowledge of verification platform and framework development, RTL and Gate level (optional) functional verification; Proven experience of IP/Sub more »
Cambridge, Cambridgeshire, East Anglia, United Kingdom
Langham Recruitment Limited
automation and manual tests through electrical test equipment. Qualifications and Experience: Strong experience in digital custom IC design. Strong experience in digital IC verification (UVM, SVA, VIP, and UPF), for ASIC implementation. Strong RTL coding with Verilog and System Verilog. Strong knowledge of interface technology (I2C, SPI, UART, SWD, JTAG more »
Employment Type: Contract
Rate: £45 - £70 per hour, Benefits Hybrid working Outside IR35
automation and manual tests through electrical test equipment. Skills and Experience: Strong experience in digital custom IC design. Strong experience in digital IC verification (UVM, SVA, VIP, and UPF), for ASIC implementation. Strong RTL coding with Verilog and System Verilog. Strong knowledge of interface technology (I2C, SPI, UART, SWD, JTAG more »
Cambridge, Cambridgeshire, East Anglia, United Kingdom
Langham Recruitment Limited
automation and manual tests through electrical test equipment. Qualifications and Experience: Strong experience in digital custom IC design. Strong experience in digital IC verification (UVM, SVA, VIP, and UPF), for ASIC implementation. Strong RTL coding with Verilog and System Verilog. Strong knowledge of interface technology (I2C, SPI, UART, SWD, JTAG more »
automation and manual tests through electrical test equipment. Skills and Experience: Strong experience in digital custom IC design. Strong experience in digital IC verification (UVM, SVA, VIP, and UPF), for ASIC implementation. Strong RTL coding with Verilog and System Verilog. Strong knowledge of interface technology (I2C, SPI, UART, SWD, JTAG more »
over 40 years’ experience, as they look to expand their Verification team. Bachelors or Masters in Electronic Engineering or a related field Experience with UVM/OVM Experience with System Verilog and System Verilog Assertions Strong Debugging skills For more information on this role or others then please contact Jordan more »
Verification Engineer will have: A BSc/MSc degree in Computer Engineering or similar Proven experience in Hardware Verification, with expertise within SystemVerilog/UVM A keen interest to work on RISC-V projects Previous experience working on CPU/GPU Verification is ideal A great work ethic, eagerness to more »
Northampton, Northamptonshire, East Midlands, United Kingdom Hybrid / WFH Options
Technical Futures
include: A Bachelors or Masters Degree in an Electronics related discipline. Proven experience working within the Semiconductor industry. Competence in Digital Design Verification using UVM or similar. Experience with SystemVerilog Assertions. Good knowledge of simulation tools (Cadence ideal). A track record in verifying complex designs. Good Scripting skills. The more »
Xcelium, Spectre(X) and Simvision; Strong foundational knowledge of digital/mixed-signal design & verification; Knowledge and hands-on experience of System Verilog and UVM;It is an advantage if you also have: Hands-on experience in hardware-software debugging at the system or application level; Hands-on experience in more »
least 5 years of experience in Verilog and/or System Verilog. Experience on IP/block level Test-bench bring up on SV UVM based platform At least 5 years of experience in of IP verification including delivering to metric targets. Able to understand complex Design specification, derive features more »
out of a brand new office with state of the art hardware. We are looking for a RTL verification expert to build up a UVM system and implement RTL simulations for system-level functional verification of our FPGA designs. Ideally, this candidate would be proficient with Cadence Xcelium , as this more »
design specification definition providing feedback from the verification perspective Be able to influence and advance CPU verificationmethodology Have excellent knowledge of SystemVerilog and UVM You might also have: Experience leading small teams Knowledge of CPU/GPU architecture Knowledge of standard bus protocols (e.g., AMBA5 CHI, AMBA4 ACE or more »
level design, including the use of standard bus protocols, bus architecture design and chip-level clock and reset architecture An understanding of verification principles (UVM preferred). Experience of chip bring-up and debug from a design perspective. Collaboration with Analog, Verification and DFT Engineers If you are interested in more »
of RTL design, Experience with standard bus protocols, Experience working on automotive IC's or knowledge of automotive frameworks such as ISO26262 Experience in UVM, DSP, Filter Design or FPGA would be highly desirableBeing a top company, my client offers a completive salary, flexible working options as well as stock more »
the flow – requirements collection, methodology and test plans, testbench implementation, coverage closure, documentation etc. Deep understanding of modern verification and validation techniques including formal, UVM/OVM/eRM, low power, emulation A strong analytical approach capable of building and using data driven approaches to reporting, closure and sign-off more »
Cambridge, England, United Kingdom Hybrid / WFH Options
Connected Consulting Limited
for FPGA and/or ASIC, together with an understanding of FPGA device architecture. For verification you will be using System-Verilog and possibly UVM, this will include coding System Verilog Assertions (SVA) checks, cover-properties, SV coverage groups etc. You will be part of a large team working within … ideally, some grounding in assembly language and object-orientated coding (e.g. C++) Experience with the implementation of ASIC/SoC RTL in FPGA SV UVM test benches, using UVMVerification IPs Xilinx FPGA technology. Synopsys tool flows. If you have the required experience and want to be part of a more »
