51 to 75 of 84 UVM Jobs in the UK

Job Title: Firmware/FPGA Engineer Location: Multiple locations across the UK (Bristol, London, Essex) Contract Type: Inside IR35 About Us: We are a leading services company specializing in Defence systems. Our team is dedicated to designing, developing, and delivering More ❯

Job Title: Firmware/FPGA Engineer Location: Multiple locations across the UK (Bristol, London, Essex) Contract Type: Inside IR35 About Us: We are a leading services company specializing in Defence systems. Our team is dedicated to designing, developing, and delivering More ❯

Job Description: Are you ready to shape the future of cutting-edge technology? Leonardo, a global leader in advanced electronics, is seeking Firmware/FPGA Engineers at various levels to join our innovative teams across the UK. Whether you're More ❯

close collaboration with Analog and Digital Design engineers. Description Definition and design of Self-checking verification environments for multi-layer systems using the SystemVerilog UVM library. The responsibility spans from concept discussions, verification strategy definition and execution of the verification tasks to ensure bug-free tape-outs. The AMS DV … to support them are part of the AMS DV team's DNA. Minimum Qualifications Knowledge of System Verilog test-bench language and UVM (Universal Verification Methodology) Hands-on experience with constrained random verification environments Basic design background in support of verification results analysis Knowledge of Object Oriented Programming (OOP) Proficiency More ❯

equivalent tools). Hands-on experience with RTL design languages such as Verilog, SystemVerilog, or VHDL. Experience with verification methodologies such as UVM (Universal Verification Methodology) or other simulation-based verification techniques. Experience with assertions (e.g., SVA - SystemVerilog Assertions) and formal verification environments. On offer is the chance to join More ❯

equivalent tools). Hands-on experience with RTL design languages such as Verilog, SystemVerilog, or VHDL. Experience with verification methodologies such as UVM (Universal Verification Methodology) or other simulation-based verification techniques. Experience with assertions (e.g., SVA - SystemVerilog Assertions) and formal verification environments. On offer is the chance to join More ❯

equivalent tools). Hands-on experience with RTL design languages such as Verilog, SystemVerilog, or VHDL. Experience with verification methodologies such as UVM (Universal Verification Methodology) or other simulation-based verification techniques. Experience with assertions (e.g., SVA - SystemVerilog Assertions) and formal verification environments. On offer is the chance to join More ❯

digital hardware design for FPGA using VHDL Experience and knowledge of video processing and control law algorithms Working knowledge and experience of UVM (Universal Verification Methodology) constrained random verification This really is a fantastic opportunity for an FPGA Engineer to progress their career. If you are interested please apply as More ❯

SoC Verification Engineer. Candidates must be based in the UK, although the work can be performed remotely. Job Responsibilities Deploying Verification Methodologies such as UVM and Formal Verification Developing Testbenches and Verification Components such as UVCs, C models, and Vertical/Horizontal re-usable Verification Environments Test plan development based … for verifying complex units on SoC using industry standard tools and technologies Proficient in developing unit and subsystem level test benches using SV/UVM methodology Constrained random and Metrics driven verification Experienced with C model integration and scoreboarding FW code integration verification Experience with AMBA protocols and BUS interconnect More ❯

primary focus will be working on IP and SoC Verification. This position reports to the Sr. Manager, Digital Design Verification. Job Duties Develop SystemVerilog-UVM testbenches and resolve complex test bench challenges Define and implement a functional coverage model to ensure complete design verification Ensure the design verification meets sign … take end-to-end ownership of their verification Contribute to improving the verification strategy and architecture of SoC testbenches Strong proficiency in SystemVerilog and UVM Understanding of industry-standard protocols such as USB, AMBA and I3C Proficiency in scripting languages including Python, Perl, or Tcl Proficiency in C/C++ More ❯

FPGA Engineers - SC Clerarable Firmware/FPGA Engineers - Luton - Bristol or Basildon 4 days on site hybrid These are ongoing contract positions, 12 months initially (Inside of IR35). Duties: Designing, developing, and delivering firmware solutions. Responsibilities will include: Concept More ❯

your own workstreams, mentor junior engineers, and contribute to innovation using cutting-edge tools and technique, such as model-based design and UVM(Universal Verification Methodology). What You?ll Need: Degree/HND in Electronics or similar Strong FPGA/PLD development experience Proficient in VHDL, synthesis, simulation, and … verification tools Solid grasp of design constraints and system integration Bonus if you bring: Experience with video processing or control algorithms Knowledge of UVM and constrained-random verification Background in safety-critical or high-integrity systems Disclaimer: This vacancy is being advertised by either Advanced Resource Managers Limited, Advanced Resource More ❯

your own workstreams, mentor junior engineers, and contribute to innovation using cutting-edge tools and technique, such as model-based design and UVM(Universal Verification Methodology). What You?ll Need: Degree/HND in Electronics or similar Strong FPGA/PLD development experience Proficient in VHDL, synthesis, simulation, and … verification tools Solid grasp of design constraints and system integration Bonus if you bring: Experience with video processing or control algorithms Knowledge of UVM and constrained-random verification Background in safety-critical or high-integrity systems Disclaimer: This vacancy is being advertised by either Advanced Resource Managers Limited, Advanced Resource More ❯

About Us Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop new and highly innovative electronic products faster and more cost-effectively. Our customers use our tools More ❯

About Us Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop new and highly innovative electronic products faster and more cost-effectively. Our customers use our tools More ❯

methodologies. The ideal candidate will be experienced in verifying complex SoC architectures, utilizing languages such as C, System Verilog (SV), and Universal Verification Methodology (UVM). This role involves close collaboration with design teams to ensure that all aspects of the SoC are thoroughly validated, from architectural design to implementation. More ❯

including microcontrollers and connectivity SoC/IP subsystem verification planning, test infrastructure development, functional verification. Test bench and test case generation using Verilog, SystemVerilog, UVM, C, Formal. Embedded C code or writing CPU-centric tests using C. Qualifications MSc in electrical engineering or equivalent or Bachelor with industrial experience Knowledge … of verification planning, assertion based and formal verification techniques, metric driven verification with UVM and C testbenches. Experience with low power verification and SoC level verification You will join a company who prides itself on a good work/home life balance and friendly culture. They value the continued growth More ❯

high-performing, and built to scale. What you will be doing: • Creating and executing thorough verification plans for complex hardware designs • Developing SystemVerilog/UVM testbenches for functional verification • Running directed and constrained-random tests • Maintaining regression suites to validate design quality • Supporting system-level performance validation • Debugging design issues … Using formal verification techniques when appropriate Requirements: • 5+ years of hands-on experience in hardware verification (preferably in SoCs) • Strong skills in SystemVerilog and UVM • Experience with modern verification tools (ABV, CDV, etc.) • Bonus: Experience with GPU, vector processors, or AI accelerators • Bonus: Familiarity with RISC-V architecture • Strong debugging More ❯

high-performing, and built to scale. What you will be doing: • Creating and executing thorough verification plans for complex hardware designs • Developing SystemVerilog/UVM testbenches for functional verification • Running directed and constrained-random tests • Maintaining regression suites to validate design quality • Supporting system-level performance validation • Debugging design issues … Using formal verification techniques when appropriate Requirements: • 5+ years of hands-on experience in hardware verification (preferably in SoCs) • Strong skills in SystemVerilog and UVM • Experience with modern verification tools (ABV, CDV, etc.) • Bonus: Experience with GPU, vector processors, or AI accelerators • Bonus: Familiarity with RISC-V architecture • Strong debugging More ❯

cause design issues, working with design engineers Work with engineers from other disciplines towards mutual targets Participate in design and verification reviews Write SV-UVM tests, sequences, functional coverage, assertions Develop test benches in UVM Utilise the latest techniques, tools and technologies for verification activities Actively plan and schedule your … Ability to determine verification requirements from the analysis of specifications Experience of debug and testing methodologies Experience with industry-standard verification methodologies and tools (UVM/SystemVerilog, Tools like VCS/Cadence/Questa) Experience in version control systems (e.g., Git/Mercurial/Perforce/Subversion) You might also More ❯

considered) Contract : Contract | Outside IR35 Hourly Rate : Negotiable What You will Do: Develop verification plans for complex hardware designs Create and run SystemVerilog/UVM testbenches Support performance validation and debug issues Use formal verification techniques as needed Requirements: 5+ years of experience in hardware verification (preferably SoCs) Strong skills … in SystemVerilog and UVM Familiarity with GPU , AI accelerators , or RISC-V (bonus) Experience with scripting languages (Python, Perl, TCL) Why Join? Work on cutting-edge GPU and AI projects Be part of an innovative and flexible team If you are interested, please send me your CV. Feel free to More ❯

cutting-edge products. Responsibilities Develop and implement verification plans for complex ASIC designs Write and maintain SystemVerilog testbenches and test cases Create and execute UVM-based verification environments Collaborate with cross-functional teams to ensure design and verification goals are met Debug issues and work closely with design engineers to … or Master's degree in Electrical Engineering, Computer Engineering, or related field Solid understanding of ASIC verification methodologies and tools Proficiency in SystemVerilog and UVM Experience with verification of neuromorphic chips and AI accelerators is a plus Strong problem-solving and debugging skills You must have UK working rights and More ❯

Senior CPU Verification Engineer European Tech Recruit are working closely with a leading semicon company, based in Cambridge, who are looking for a talented Senior CPU Verification Engineer to join their team . Responsibilities as Senior CPU Verification Engineer: Development More ❯

Senior CPU Verification Engineer European Tech Recruit are working closely with a leading semicon company, based in Cambridge, who are looking for a talented Senior CPU Verification Engineer to join their team . Responsibilities as Senior CPU Verification Engineer: Development More ❯

Senior CPU Verification Engineer European Tech Recruit are working closely with a leading semicon company, based in Cambridge, who are looking for a talented Senior CPU Verification Engineer to join their team . Responsibilities as Senior CPU Verification Engineer: Development More ❯