Verification Engineer Job Vacancies

51 to 69 of 69 Verification Engineer Jobs

Staff Verification Engineer - Media IP

Cambridge, Cambridgeshire, United Kingdom
Hybrid / WFH Options
Arm Limited
backend implementation support and IP maintenance. Identify cross Media IP process or methodology improvement opportunities, implementing changes to advance the hardware design efficiency. Collaborate closely with colleagues in the verification teams, modelling teams, software driver developers, multimedia architects and imaging researchers. Mentor & support other members of the team Required skills and experience: Experience in ASIC RTL design, ideally for More ❯
Employment Type: Permanent
Salary: GBP Annual
Posted:

Verification & Validation Engineer with Security Clearance

Webster, Texas, United States
Associates Systems LLC
Our mission-driven team is seeking a bold and dynamic Senior Verification and Validation Engineer who is fueled by problem-solving, continuously curious, and driven to understand our world, science/technology, and life itself, for the benefit of all on Earth and beyond. DUTIES & RESPONSIBILITIES Plan and implement verification and validation (V&V) strategy, including implementation … practices and processes. Work closely with NASA to integrate joint verification activities with the International Space Station Manage customer-related integrated V&V plans. Lead V&V collaboration efforts both internally and externally. Establish and oversee verification requirements for subsystems and suppliers as part of the integrated V&V plan Collaborate with system and subsystem engineers, program office … made to enable individuals with disabilities to perform the essential functions. Education & Experience Bachelor's Degree in engineering (aerospace, electrical, mechanical, or related discipline) 10+ years' experience in engineering verification and validation activities, including V&V strategy development, planning, and execution or a combined equivalent of education and experience A background in space systems engineering is desired, including an More ❯
Employment Type: Permanent
Salary: USD Annual
Posted:

Hardware Verification Engineer

Bristol, Avon, England, United Kingdom
Eclectic Recruitment
A fantastic opportunity has arisen for a self-driven individual to use their knowledge and expertise to implement a structured Test Philosophy for current and future products. This is a highly visible role, providing you with the opportunity to collaborate More ❯
Employment Type: Full-Time
Salary: £50,000 - £55,000 per annum
Posted:

Hardware Verification Engineer

Bolton, Lancashire, England, United Kingdom
Eclectic Recruitment
A fantastic opportunity has arisen for a self-driven individual to use their knowledge and expertise to implement a structured Test Philosophy for current and future products. This is a highly visible role, providing you with the opportunity to collaborate More ❯
Employment Type: Full-Time
Salary: £50,000 - £55,000 per annum
Posted:

Hardware Verification Engineer

Stevenage, Hertfordshire, England, United Kingdom
Eclectic Recruitment
A fantastic opportunity has arisen for a self-driven individual to use their knowledge and expertise to implement a structured Test Philosophy for current and future products. This is a highly visible role, providing you with the opportunity to collaborate More ❯
Employment Type: Full-Time
Salary: £50,000 - £55,000 per annum
Posted:

End To End Systems Verification and Validation Engineer

London, United Kingdom
Viasat
to design and procurement of the space segment, ground segment and user infrastructure to provide communications services by the end of the decade. We are seeking a systems-oriented engineer to lead the integration, verification, validation (IVV), and operational readiness of a complex satellite communications system. You will ensure alignment from satellite manufacture through to ground operations and … service delivery, with a focus on the entire end-to-end chain. The day-to-day • Define and implement a comprehensive end-to-end communications verification strategy across terminal, ground, and space segments. Lead the development and execution of the system-level IVV roadmap for the communications service. • Design and implement an end-to-end communications test bed, identifying … and engaging industry partners as needed. • Own the test lifecycle, including defining verification methods, maintaining Verification Control Matrices (VCMs) and Documents (VCDs), generating Test Plans, Test Procedures, and issuing Test Reports. • Support the planning and execution of Satellite Validation Tests (SVT), including simulation campaigns and operations command/telemetry validation. • Contribute to the planning and definition of System More ❯
Employment Type: Permanent
Salary: GBP Annual
Posted:

System Verification Engineer PLATFORMS Tekever Production (UK)

United Kingdom
Tekever Corporation
are manufactured with excellence and innovation. Here, we don't just design the future - we build it, piece by piece. What will be your responsibilities: Plan, prepare and execute verification activities on fully assembled UAV platforms Perform system-level functional tests, flight readiness checks and acceptance trials. Deploy and configure mission-critical software parameters onto bespoke UAV hardware. Collaborate … functional system behavior. Troubleshoot integration issues, document anomalies and support root cause analysis. You will be responsible for ensuring that integrated systems meet design requirements. Create and maintain comprehensive verification documentation, including test procedures, reports and results. Profile and requirements: Degree in Mechanical Engineering or a proven track record from arelevant employment role. Strong understanding of UAV subsystems including More ❯
Employment Type: Permanent
Salary: GBP Annual
Posted:

Senior Design Verification Engineer

Bristol, Gloucestershire, United Kingdom
Weare5vtech
DFT Technical Lead - Digital & SoC Design (CDI) Location: Paris, Caen, or Remote in France Salary: Up to €110,000 Gross per annum + company benefits Join an innovative global semiconductor specialist in high-performance mixed-signal and digital ASICs. They More ❯
Employment Type: Permanent
Salary: GBP Annual
Posted:

R&D Verification Engineer

Cambridge, Cambridgeshire, United Kingdom
ANSYS, Inc
Press Tab to Move to Skip to Content Link Select how often (in days) to receive an alert: Date: Jul 7, 2025 Location: Cambridge, GB, CB1 7EG Company: Ansys Requisition #: 16326 Ansys is now a part of Synopsys. Synopsys More ❯
Employment Type: Permanent
Salary: GBP Annual
Posted:

Design Verification (DV) Engineer

London, United Kingdom
Hudson River Trading
spectrum of speed and smarts: from bespoke circuits to world-class machine learning accelerators. These high performance designs require even higher performance verification. We are looking for experienced Design Verification (DV) engineers who are skilled at writing testbenches and building verification environments to exercise complex HDL. Our ideal candidate is not only an ace tester, but a practicing … redesign, and surpass the status quo. For example, members of our team are active maintainers of popular open source projects such as Slang, Verilator, and Cocotb. FPGA and ASIC verification is part of an innovative, growing team at HRT which is integral to the success of our trading. You can expect to always be challenged by the ever-changing … designs Managing test suites and continuous integration infrastructure Developing and improving open-source and internal tools Qualifications Superb debug and analytical skills Professional experience (2+ years) in RTL functional verification for FPGA or ASIC Experience with code and functional coverage collection/analysis Experience with SystemVerilog and industry-standard frameworks such as UVM Experience with Python Familiarity with Verilator More ❯
Employment Type: Permanent
Salary: GBP Annual
Posted:

Senior Integration, Verification, Validation & Qualification (IVVQ) Engineer

Cheadle, Staffordshire, United Kingdom
Expleo
Overview We are seeking a highly organised and motivated Integration, Verification, Validation and Quality Engineer to join our proactive and innovative team. As a Senior IVVQ Engineer, you will be responsible for all aspects of system integration and system testing for solutions that meet the needs of our clients and users within the rail domain. You will More ❯
Employment Type: Permanent
Salary: GBP Annual
Posted:

Principal Verification Engineer

Bristol, Avon, South West, United Kingdom
Platform Recruitment Limited
MyclientisagloballyrecognisedsemiconductorcompanydevelopinganewproductfamilybasedonRISC-Varchitecture,markingasignificantevolutionintheirtechnologyroadmap. TheyreseekingskilledverificationengineerstosupporttheincreaseddemandforfunctionalverificationacrossavarietyofcomplexIPs.Thisgrowthreflectsbothlong-terminvestmentinR&Dandastrategicshiftinarchitecture,makingitanexcitingtimetojoin. PrincipalVerificationEngineer Responsibilities: DevelopandmaintainSystemVerilogUVMtestbenchesforcomplexIPs. LeadthecreationofnewUVMverificationcomponentsandcontributetotestbencharchitecture Debugtestfailuresanddefinefunctionalcoveragemodelstoensuresign-offquality. Workcloselywithdesignersandcontributetoverificationstrategyduringdesignandconceptphases. Improveverificationefficiencyandensurecompliancewithfunctionalsafetyandqualitystandards. Requirements: Minimum5yearsofIP-levelverificationexperienceusingSystemVerilogUVM. StrongunderstandingofUVMmethodology,SVAs,andverificationmetrics. Abilitytointerpretcomplexdesignspecificationsandcreaterobustverificationenvironments. Proficiencyinindustry-standardEDAtoolsandscriptinglanguages. Excellentcommunicationskillsandamethodical,detail-focusedapproach. Applytolearnmore! More ❯
Employment Type: Permanent
Posted:

Principal Verification Engineer

newport, wales, united kingdom
Platform Recruitment Limited
MyclientisagloballyrecognisedsemiconductorcompanydevelopinganewproductfamilybasedonRISC-Varchitecture,markingasignificantevolutionintheirtechnologyroadmap. TheyreseekingskilledverificationengineerstosupporttheincreaseddemandforfunctionalverificationacrossavarietyofcomplexIPs.Thisgrowthreflectsbothlong-terminvestmentinR&Dandastrategicshiftinarchitecture,makingitanexcitingtimetojoin. PrincipalVerificationEngineer Responsibilities: DevelopandmaintainSystemVerilogUVMtestbenchesforcomplexIPs. LeadthecreationofnewUVMverificationcomponentsandcontributetotestbencharchitecture Debugtestfailuresanddefinefunctionalcoveragemodelstoensuresign-offquality. Workcloselywithdesignersandcontributetoverificationstrategyduringdesignandconceptphases. Improveverificationefficiencyandensurecompliancewithfunctionalsafetyandqualitystandards. Requirements: Minimum5yearsofIP-levelverificationexperienceusingSystemVerilogUVM. StrongunderstandingofUVMmethodology,SVAs,andverificationmetrics. Abilitytointerpretcomplexdesignspecificationsandcreaterobustverificationenvironments. Proficiencyinindustry-standardEDAtoolsandscriptinglanguages. Excellentcommunicationskillsandamethodical,detail-focusedapproach. Applytolearnmore! JBRP1_UKTJ More ❯
Posted:

Principal Verification Engineer

bath, south west england, united kingdom
Platform Recruitment Limited
MyclientisagloballyrecognisedsemiconductorcompanydevelopinganewproductfamilybasedonRISC-Varchitecture,markingasignificantevolutionintheirtechnologyroadmap. TheyreseekingskilledverificationengineerstosupporttheincreaseddemandforfunctionalverificationacrossavarietyofcomplexIPs.Thisgrowthreflectsbothlong-terminvestmentinR&Dandastrategicshiftinarchitecture,makingitanexcitingtimetojoin. PrincipalVerificationEngineer Responsibilities: DevelopandmaintainSystemVerilogUVMtestbenchesforcomplexIPs. LeadthecreationofnewUVMverificationcomponentsandcontributetotestbencharchitecture Debugtestfailuresanddefinefunctionalcoveragemodelstoensuresign-offquality. Workcloselywithdesignersandcontributetoverificationstrategyduringdesignandconceptphases. Improveverificationefficiencyandensurecompliancewithfunctionalsafetyandqualitystandards. Requirements: Minimum5yearsofIP-levelverificationexperienceusingSystemVerilogUVM. StrongunderstandingofUVMmethodology,SVAs,andverificationmetrics. Abilitytointerpretcomplexdesignspecificationsandcreaterobustverificationenvironments. Proficiencyinindustry-standardEDAtoolsandscriptinglanguages. Excellentcommunicationskillsandamethodical,detail-focusedapproach. Applytolearnmore! JBRP1_UKTJ More ❯
Posted:

Principal Verification Engineer

bristol, south west england, united kingdom
Platform Recruitment Limited
MyclientisagloballyrecognisedsemiconductorcompanydevelopinganewproductfamilybasedonRISC-Varchitecture,markingasignificantevolutionintheirtechnologyroadmap. TheyreseekingskilledverificationengineerstosupporttheincreaseddemandforfunctionalverificationacrossavarietyofcomplexIPs.Thisgrowthreflectsbothlong-terminvestmentinR&Dandastrategicshiftinarchitecture,makingitanexcitingtimetojoin. PrincipalVerificationEngineer Responsibilities: DevelopandmaintainSystemVerilogUVMtestbenchesforcomplexIPs. LeadthecreationofnewUVMverificationcomponentsandcontributetotestbencharchitecture Debugtestfailuresanddefinefunctionalcoveragemodelstoensuresign-offquality. Workcloselywithdesignersandcontributetoverificationstrategyduringdesignandconceptphases. Improveverificationefficiencyandensurecompliancewithfunctionalsafetyandqualitystandards. Requirements: Minimum5yearsofIP-levelverificationexperienceusingSystemVerilogUVM. StrongunderstandingofUVMmethodology,SVAs,andverificationmetrics. Abilitytointerpretcomplexdesignspecificationsandcreaterobustverificationenvironments. Proficiencyinindustry-standardEDAtoolsandscriptinglanguages. Excellentcommunicationskillsandamethodical,detail-focusedapproach. Applytolearnmore! JBRP1_UKTJ More ❯
Posted:

Principal Verification Engineer

bradley stoke, south west england, united kingdom
Platform Recruitment Limited
MyclientisagloballyrecognisedsemiconductorcompanydevelopinganewproductfamilybasedonRISC-Varchitecture,markingasignificantevolutionintheirtechnologyroadmap. TheyreseekingskilledverificationengineerstosupporttheincreaseddemandforfunctionalverificationacrossavarietyofcomplexIPs.Thisgrowthreflectsbothlong-terminvestmentinR&Dandastrategicshiftinarchitecture,makingitanexcitingtimetojoin. PrincipalVerificationEngineer Responsibilities: DevelopandmaintainSystemVerilogUVMtestbenchesforcomplexIPs. LeadthecreationofnewUVMverificationcomponentsandcontributetotestbencharchitecture Debugtestfailuresanddefinefunctionalcoveragemodelstoensuresign-offquality. Workcloselywithdesignersandcontributetoverificationstrategyduringdesignandconceptphases. Improveverificationefficiencyandensurecompliancewithfunctionalsafetyandqualitystandards. Requirements: Minimum5yearsofIP-levelverificationexperienceusingSystemVerilogUVM. StrongunderstandingofUVMmethodology,SVAs,andverificationmetrics. Abilitytointerpretcomplexdesignspecificationsandcreaterobustverificationenvironments. Proficiencyinindustry-standardEDAtoolsandscriptinglanguages. Excellentcommunicationskillsandamethodical,detail-focusedapproach. Applytolearnmore! JBRP1_UKTJ More ❯
Posted:

Principal Systems Verification & Validation Engineer

London, United Kingdom
Hybrid / WFH Options
Northrop Grumman Corp. (AU)
within the community. So, what's your possible? Opportunity: This is more than just a job; it's a mission. Salary: £47,400- £67,000 The V&V Principal engineer will support the planning, conduct and reporting of V&V work packages and activities in order to prove our hardware and software product compliance to their associated requirements. The … V&V Principal Engineer will work within multi-disciplined project teams under direction of the project delivery management and V&V leadership to effectively and efficiently deliver the assigned V&V activities. Our UK Defence business is a Sovereign software and systems centre of excellence. As well as developing and supporting UK wide and internationally deployed multi-domain command More ❯
Employment Type: Permanent
Salary: GBP Annual
Posted:

Integration and Verification Test Engineer with Security Clearance

Longmont, Colorado, United States
Beacon Hill
Experienced in test automation (Selenium and Sikuli) -Strong background with the Integration and Verification Life Cycle -DOORs and CAMEO: scripting in DXL -Basic knowledge of C++ (Boost and Qt) -CI/CD tools or DevOps Environment experience -Linux OS -Automated Unit Testing and ability to generate the code for execution -Software Requirements documentation (Comfortable with 30-40 hr work More ❯
Employment Type: Permanent
Salary: USD Annual
Posted:

Senior Cockpit Verification & Test Engineer

Knutsford, Cheshire, United Kingdom
Chartsign Limited
The Opportunity: Join our client, Jaguar Land Rover, as a Senior Cockpit Verification & Test Engineer. This role focuses on coordinating the development, testing, and verification of advanced cockpit systems and components. Key Responsibilities: Manage and monitor test plans ensuring alignment with JLR standards. Drive the final engineering sign-off for new cockpit designs. Create detailed test timing plans … and Bill of Materials. Liaise with suppliers and oversee budget management for test and development activities. Essential Skills: Degree qualified or equivalent experience. Strong understanding of design verification processes and engineering standards. Experience in managing technical and business resolutions within project teams. If you are ready for a challenge and have a passion for innovation in the automotive sector More ❯
Employment Type: Permanent
Salary: GBP Annual
Posted:
Verification Engineer
25th Percentile
£55,000
Median
£57,000
75th Percentile
£57,000
90th Percentile
£75,150