51 to 75 of 136 Verification Engineer Jobs

highly technical team on one of the most consequential problems in AI infrastructure today. About the Role We're looking for a Physical Verification Engineer to drive DRC/LVS signoff for our integrated circuit and photonic integrated circuit (PIC) designs. You'll work at the intersection … electronic and photonic design, running and debugging verification flows against foundry PDKs and helping keep our tapeouts clean. What You'll Do Run and debug physical verification (DRC, LVS, extraction) on IC and photonic IC layouts Debug LVS/DRC discrepancies, including port mismatches, hierarchy mismatches, and device ...

seeking an experienced verification engineer to lead the verification of a DPU subsystem within the Systems Media IP team. You will architect high-performance SystemVerilog/UVM environments and ensure robust verification across multiple units, aligning with project plans and schedules. You will work with Python …/C for tooling and contribute to verification strategies, tests, coverage, and integration into complete systems. #J-18808-Ljbffr ...

Semiconductors Glasgow security team is seeking a Senior Digital Verification Engineer to verify complex digital hardware architectures and contribute across the full verification lifecycle. You will design verification plans, implement testbenches with SystemVerilog/UVM, and apply constrained random verification, coverage-driven techniques ...

AccelerComm Ltd in Cambridge is seeking a Senior Verification Engineer to lead RTL verification of advanced wireless IP and subsystems. You will develop verification plans, create SystemVerilog/UVM environments and build testbenches, assertions and coverage models for complete UVM verification. The role requires strong SystemVerilog …/UVM skills, RTL design understanding, Linux scripting and a proactive, collaborative mindset to drive automation, CI and verification sign-off across teams. #J-18808-Ljbffr ...

AccelerComm Ltd in Cambridge is seeking a Senior Verification Engineer to lead RTL verification of advanced wireless IP for ASIC and FPGA implementations. You will develop verification plans, build SystemVerilog/UVM environments and ensure coverage and quality before tape-out. The role requires 3+ years … digital verification, strong SV/UVM, Linux scripting, and experience with coverage-driven methods. A hybrid work model in Cambridge is available with competitive compensation. #J-18808-Ljbffr ...

roleThis position is a unique opportunity to exercise your hardware verification skills on cutting edge designs within the prestigious PowerVR Hardware Graphics group. Here you will exercise your skills on key components that meet latest demands and improvements for graphics IP. You will: Oversee all verification activities … component or subsystem, from initial planning to final sign-off. Develop verification plans and build, maintain UVM testbench components. Monitor, track, and report verification metrics to ensure closure. Provide verification-focused feedback during design specification discussions. Implement UVM testbenches, including writing tests, sequences, functional coverage, assertions ...

AccelerComm Ltd. is seeking a Senior Verification Engineer in Bristol, UK to lead RTL verification across ASIC/FPGA designs. You will develop verification plans, build SystemVerilog/UVM environments, and drive robust validation prior to deployment. Hybrid working is available. The role requires 3+ years … digital verification, strong SystemVerilog/UVM skills, Linux scripting, and a collaborative mindset to work across multiple teams. #J-18808-Ljbffr ...

Heronic Technologies Limited in London is seeking a Senior Verification Engineer to own our verification strategy for next-gen AI accelerator architectures. You will design testbenches and end-to-end verification pipelines, and ensure robust coverage and quality across the design lifecycle. You will communicate findings ...

Stirling Dynamics in Bristol is seeking a Verification Engineer to join the Software & Electronics Hardware team. You will lead hardware verification activities for airborne electronic hardware and help define the verification strategy across aerospace systems. The role involves collaboration with multiple disciplines and applying design assurance ...

Qualcomm Technologies International Ltd in Cambridge seeks an ASIC Verification Engineer specializing in Formal Property Verification (FPV) to join the Engineering Group > ASICS Engineering. You will develop FPV test plans, write SystemVerilog Assertions, and collaborate with global RTL design and DV teams to drive sign-off. … role requires 2+ years in ASIC design/verification, a degree in Science/Engineering (BS/MS/PhD), and hands-on FPV tool experience with JasperGold/VC Formal. #J-18808-Ljbffr ...

Intellectual Capital Resources Ltd in Cambridge is seeking a Senior Verification Engineer to join a rapidly growing HW team. You will work on cutting-edge technology in quantum computing and learn alongside world-class engineers in a cross-disciplinary environment. You will own verification across block, subsystem … multi-FPGA designs, develop scalable UVM testbenches and define the verification strategy in collaboration with the Lead Verification Engineer. #J-18808-Ljbffr ...

Profectus Recruitment is seeking a hands-on Safety-Critical Verification Engineer to join its client in Oxfordshire. You will work on verification strategies for safety-critical embedded software and systems in a hybrid environment with 3 days on-site. The role focuses on developing test frameworks, verification plans and certification evidence, performing requirements-based verification, and supporting DO-178C activities, with opportunities to apply automated testing, fault injection and Monte #J-18808-Ljbffr ...

Description Verification Engineer \ N Salary to £60k + benefits \ N Hybrid role - 3 days a week (Tues, Wed, Thurs) on-site in Witney, Oxfordshire, \ N Company \n Pioneering safeguards for embodied-AI, this company is building the trust layer for autonomy and physical AI. They ...

Apple, Inc. in London seeks an Experienced AMS Design Verification Engineer to enable bug-free first silicon for mixed-signal designs. You will craft verification environments, write test scenarios and assertions, and collaborate with Analog and Digital Design engineers across the AMS DV team. The role focuses … self-checking verification, SystemVerilog UVM, and power/timing analyses, with opportunities to advance verification techniques and toolchains in a cutting-edge environment. #J-18808-Ljbffr ...

Analog Devices in the United Kingdom seeks a Staff Design Verification Engineer to contribute to pre-silicon verification of analog and mixed-signal products. You will collaborate with a global team to establish best-practice verification methodology and drive high coverage across complex designs. The role … requires 7+ years of experience in full chip verification and strong Cadence tool proficiency, with scripting skills for automation. #J-18808-Ljbffr ...

standard in made-for-AI compute hardware and software. A chance to be part of the AI revolution! I am looking for experienced Verification Engineers to join a world class silicon engineering team, joining a company who bring large and ongoing investment from one of the world's leading … backers of innovative AI companies! SW Verification experience with Python, C/C++ is welcome alongside the traditional UVM based Verification. Responsibilities and duties Verification activities within the verification team Ensuring good communication between sites Verification planning, specification and closure of functional coverage Providing feedback ...

Apple, Inc. seeks a Design Verification Engineer in Swindon to enable bug-free first silicon for mixed-signal designs, collaborating with Digital and Analog teams. You will craft verification plans, build and maintain test benches, and run constrained random tests to verify complex designs. You’ll develop … coverage points, analyze results, and refine verification environments to reach full coverage. Strong SystemVerilog/UVM knowledge and scripting abilities are essential. #J-18808-Ljbffr ...

team in Cambridge is seeking a verification engineer who loves graphics and solving complex hardware/software challenges. You will test new HW features and graphics APIs, implement and close Functional Coverage, and debug failures across design, verification and software driver teams. The role blends hardware verification ...

Apple Inc. UK is seeking a Graphics Design Verification Engineer to contribute to pre-silicon RTL verification for high-performance graphics IP in mobile devices and PCs. You will use SystemVerilog, UVM, C++, and scripting to build test benches, generate tests, run simulations, and drive complex ...

looking for a Systems Test & Verification Engineer to join a specialist engineering team developing high-integrity, safety-critical technology for next-generation autonomous platforms. Location: Oxfordshire - commutable from Oxford and surrounding areas. Please note, the role requires office attendance 3 days per week. The Role Develop and execute … system robustness What We're Looking For Experience in software, embedded or systems testing within a safety-critical or regulated environment Strong understanding of verification, validation, requirements-based testing and traceability Experience with embedded/real-time systems and automated testing approaches for autonomous systems Please apply ...

looking for a Systems Test & Verification Engineer to join a specialist engineering team developing high-integrity, safety-critical technology for next-generation autonomous platforms. Location: Oxfordshire - commutable from Oxford and surrounding areas. Please note, the role requires office attendance 3 days per week. The Role Develop and execute … system robustness What We're Looking For Experience in software, embedded or systems testing within a safety-critical or regulated environment Strong understanding of verification, validation, requirements-based testing and traceability Experience with embedded/real-time systems and automated testing approaches for autonomous systems Please apply ...

Redline Group in London seeks a Lead Validation & Verification Engineer with strong high voltage systems and embedded testing experience to join a global engineering leader in fibre-optic and subsea cable manufacturing. You will lead VVQ activities, define test architectures, coordinate qualification campaigns and mentor engineers while ensuring ...

looking for a Systems Test & Verification Engineer to join a specialist engineering team developing high-integrity, safety-critical technology for next-generation autonomous platforms. The information below covers the role requirements, expected candidate experience, and accompanying qualifications. Location: Oxfordshire - commutable from Oxford and surrounding areas. Please note … system robustness What We're Looking For Experience in software, embedded or systems testing within a safety-critical or regulated environment Strong understanding of verification, validation, requirements-based testing and traceability Experience with embedded/real-time systems and automated testing approaches for autonomous systems Please apply ...

Expleo is seeking a Systems Design & Verification Engineer to support UK Defence programmes from Filton/Bristol. You will provide systems engineering across naval air defence C2 capabilities, focusing on requirements management, design analysis, traceability and verification planning throughout the lifecycle. The role requires eligibility ...

leading technology startup in the UK seeks a SoC/ASIC Design Verification Engineer to enhance silicon security. Responsibilities include verifying chip functionality, developing verification environments, and engaging with customers to address their needs. Candidates should have a Bachelor's degree in a related field … years of experience with verification methodologies. This role offers opportunities for growth and contributing to cutting-edge security solutions in IoT and industrial sectors. #J-18808-Ljbffr ...