51 to 75 of 218 ASIC Jobs in the UK

teams and programming languages to find root causes of deep and complex issues Experience of the verification process applied in CPU and/or ASIC environments System Verilog, Python, C++, Linux Desirable UVM SVA Assembly languages LLVM, GCC DVCS e.g. Git SGE or other DRMS XML and XPath/XSLT ...

Overview Swedium Global Services is a growing System Engineering and Solution Company, offering services like Semiconductor Engineering R&D Services, Embedded Systems Development, Custom Application Software Development, Web and Cloud Application Development, Testing ...

Skills Experience within financial services, capital markets, regulatory reporting, or other highly regulated environments. Knowledge of regulatory reporting domains such as MiFID, EMIR, SFTR, ASIC, MAS, or related frameworks. Experience building large-scale data processing and data-intensive applications. Experience with event-driven architectures, messaging platforms, and streaming technologies. Experience ...

/SystemVerilogDeveloping high-speed modules (PCIe, Ethernet, DDR/QDR) with deep pipeliningUsing simulation and formal tools (Verilator, Cocotb, etc.) for validationWorking across teams (ASIC, software, infra) to co-design tightly coupled platformsContributing to tooling, flow, and potentially DSL extensionsWhat We’re Looking ForStrong RTL skills with experience building complex ...

Skills:Experience within financial services, capital markets, regulatory reporting, or other highly regulated environments.Knowledge of regulatory reporting domains such as MiFID, EMIR, SFTR, ASIC, MAS, or related frameworks.Experience building large-scale data processing and data-intensive applications.Experience with event-driven architectures, messaging platforms, and streaming technologies.Experience with observability, monitoring ...

Skills: Experience within financial services, capital markets, regulatory reporting, or other highly regulated environments. Knowledge of regulatory reporting domains such as MiFID, EMIR, SFTR, ASIC, MAS, or related frameworks. Experience building large-scale data processing and data-intensive applications. Experience with event-driven architectures, messaging platforms, and streaming technologies. Experience ...

Oriole Networks is seeking an experienced Verification Engineer to design and implement high-performance verification for FPGA/ASIC interfaces at 100Gbps+ speeds. You will build testbenches, develop tests, and drive coverage closure across module and system levels. You will collaborate closely with RTL and hardware teams, applying advanced verification ...

Strong HDL, lab debug, and FPGA toolchain experience are essential. This role offers collaboration with academia and industry, tackling real-world probabilistic computing and ASIC-tapeout preparation. #J-18808-Ljbffr ...

Strong electronic hardware verification experience within aerospace In-depth experience working to DO-254 Experience leading end-to-end verification of electronic hardware, FPGA, ASIC and/or PLD-based systems Development and ownership of verification plans, strategies and compliance matrices Requirements-based hardware verification and traceability Experience defining verification ...

real AI workloads. You'll work across the boundary between hardware and software, owning the runtime, SDK and APIs that interface with FPGA/ASIC hardware while focusing heavily on performance, developer experience and hardware/software co-design. For this Systems Software Engineer role, we are looking for someone ...

service providers.About You8+ years' experience as a Physical Design Engineer.Bachelor’s degree in Electrical Engineering, Computer Science or a related field.Strong experience across the ASIC/COT physical design flow, including synthesis, floor-planning, P&R, CTS, parasitic extraction, STA, timing closure, physical verification, power analysis, formal verification, DFT/ ...

service providers.About You8+ years' experience as a Physical Design Engineer.Bachelor’s degree in Electrical Engineering, Computer Science or a related field.Strong experience across the ASIC/COT physical design flow, including synthesis, floor-planning, P&R, CTS, parasitic extraction, STA, timing closure, physical verification, power analysis, formal verification, DFT/ ...

team where your ideas directly influence cutting-edge digital hardware solutions and where you’ll gain hands-on experience across the complete FPGA and ASIC development lifecycle. This is an excellent opportunity for engineers looking to accelerate their technical growth, work on challenging projects, and collaborate with experienced industry professionals ...

You8+ years' experience as a Physical Design Engineer. Bachelor's degree in Electrical Engineering, Computer Science or a related field. Strong experience across the ASIC/COT physical design flow, including synthesis, floor-planning, P&R, CTS, parasitic extraction, STA, timing closure, physical verification, power analysis, formal verification, DFT/ ...

review technical documentation, including specifications, schematics, and hardware test plans. Perform functional simulation, synthesis and static timing analysis targeting FPGA and/or ASIC technologies. Collaborate with firmware, software, and systems engineers to ensure successful hardware/software integration. Support hardware verification, validation, laboratory bring-up and board-level debugging. ...

role Full Chip Physical Design (PD) Expert is responsible for handling the entire physical implementation process of a complex System-on-Chip (SoC) or ASIC, from initial design handoff (RTL or netlist) to final sign-off for manufacturing (GDSII). This role demands deep expertise across all aspects ...

Yoh, A Day & Zimmermann Company is seeking a Senior Verification Engineer to own UVM-based verification across complex communications IP, taking it from specification through to sign-off. You will work with architects, RTL designers ...

CUDA/Triton/Pallas/CuTe DSL kernel development, lower-level PyTorch/JAX/XLA development, CUDA Graphs, FPGA/ASIC experienceMust have two or more years work experience building deep learning systems, for any domain: robotics, biology, chemistry, physics, audio, video, recommendations, etc.Experience translating methods between areas ...

valuable, but not necessary.Strong engineering skills valued, especially any of: GPU kernel development, lower-level Pytorch/JAX development, intermediate C++, FPGA/ASIC experience, HPC experience.The estimated base salary range for this position is 200,000 to 300,000 USD per year (or local equivalent). The base ...

head an FPGA/digital design team focused on space-based 5G communications. You will own technical direction and drive high‐performance FPGA/ASIC delivery, working with cross‐functional teams to translate requirements into robust hardware solutions. The role blends hands-on engineering with team leadership, mentoring engineers ...

Engineer to focus on the verification of microprocessor IP features. This role involves collaboration with diverse teams and requires proficiency in C++, debugging, and ASIC verification. The ideal candidate possesses a Bachelors or Masters degree in Electrical Engineering and at least 3 years of relevant experience. Join AMD in creating ...

seeking a Principal Design Team Leader to steer the hardware design of 5G base station and space-qualified IP. You will guide RTL/ASIC/FPGA development, drive delivery, and ensure robust verification, with a focus on power efficiency and performance. The role requires hands-on leadership, collaboration with ...

complex SoC solutions.About You5+ years' experience in VLSI engineering.Bachelor’s degree in Electrical Engineering, Computer Science or a related field.Strong knowledge of the full ASIC/VLSI design flow and tool chain.Experience with RTL coding, verification, physical-design-aware synthesis and STA.Experience in VLSI architecture and digital design.Good understanding ...

About You5+ years' experience in VLSI engineering. Bachelor's degree in Electrical Engineering, Computer Science or a related field. Strong knowledge of the full ASIC/VLSI design flow and tool chain. Experience with RTL coding, verification, physical-design-aware synthesis and STA.Experience in VLSI architecture and digital design. Good ...

have: A degree in Electrical/Electronic Engineering, Computer Engineering or a related discipline Strong hands-on experience in Physical Design for complex ASIC or CPU/SoC designs Experience across the full implementation flow including floorplanning, place and route, CTS and physical sign-off Familiarity with industry-standard ...